Remedial DAC design questions
This is my first post to this site. Hope I don't offend anyone with my ignorance with some of this stuff I'm posting today.
I am planning on making my own DAC with a tube output stage to compliment my two channel 6550 PP amp I just built a few months ago. The overall project would be as follows:
SPDIF->CS8414 (or DIR1703)->SRC4192->DF1706->
As a newbie to digital to analog converter design, I have a few remedial questions to get me started. Hopefully you guys can help me out.
1. Are there benefits to using a DIR1703 than a CS8414?
2. Is the DIR1703 the correct receiver to use since the other IC's require a 3.3 vdc supply? [The DIR1703 requires a 3.3 volt supply whereas the CD8414 needs 5vdc]
3. I'm not sure of how many bits are on my SPDIF line. Is there a way to measure it with one of the above receiver chips? Does it matter?
4. Going through a few schematics I have found, it appears that some use I2S and others use right-justified data formats when doing the intermediate digital processing. Which is better or is it just a personal preference? I already understand that the PCM1704 chips need a specific format input (right justified).
5. Is the purpose of a sample rate converter to accept a 16 bit word and output a word of a different bit size? In other words, 16 bit in and 24 bit out? It appears that you can change the formatting (ie left justified in and right justified out) with these chips too.
6. If you had a 16 bit SPDIF line and configured the output of the receiver chip for 24 bit data (either DIR1703 or CS8414), would you get garbage on the line?
Thanks in advance!
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