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Old 28th July 2012, 07:41 AM   #1081
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thx Patrick

I don't know what theory says about - that Is why I ask
but Is It too low If cut off Is at 20 KHz or It has to be multiple of some freq
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Old 28th July 2012, 09:51 AM   #1082
EUVL is offline EUVL  Europe
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You can find tons of info via google on LP filters for DAC.

Why do we use low pass filter after DAC ?
DAC output filters need explanations
Digital-to-analog converter - Wikipedia, the free encyclopedia
Reconstruction filter - Wikipedia, the free encyclopedia


Patrick
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Old 29th July 2012, 04:58 PM   #1083
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Quote:
Originally Posted by heb1001 View Post
I did a sim and your idea affects the frequency response of the circuit more than the distortion - the capacitors you suggest act like extra Civ. I don't know whether they'd help with RFI.

My solution is just to put it in an enclosure. I get the results I posted in #1069 which I think are good enough and the original Sen is better for noise than my variant so you should expect better.

I can get better results than those of #1069 if I reduce RM - noise goes down and distortion goes up a little.
I agree. I made the suggestion before I simulated the effects on my circuit.

I think one good way is just to put a good RF capacitor across the 18V supply.

But, speaking of using batteries for the 18V supply, I believe a regulator is required anyway since two "9V" batteries will not produce exactly 18V. The actual voltage of batteries varies a lot (7.2V to 9.6V for example), depending on the type and the state of charge, so the distortion and voltage output for the circuit will change a lot with batteries. I don't see a problem with floating a regular power supply for this purpose.
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Old 30th July 2012, 02:12 PM   #1084
heb1001 is offline heb1001  China
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Listening test of #998 ultimately disappointing. Trying #908 for a while.
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Old 30th July 2012, 02:35 PM   #1085
EUVL is offline EUVL  Europe
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To be honest I am not surprised at all.

I do not consider it necessary to use a source follower to drive the gates.
Tying them to Gnd or to the Vref divider for ES9018 as I posted is low impedance enough.
You made thing worst by running the Source Follower off the floating PSU.
This introduces an additional capacitive path of current to Gnd as the rail swings with signal.
This was not there originally and IMHO destroys the beauty of the circuit.

If you have to do this then the source followers should have split-rails referenced to Gnd, meaning yet more additional power supplies.

But for an academic experiment, I thought it would make a good exercise.
Just to show you simulation does not replace human thinking.


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Old 30th July 2012, 02:43 PM   #1086
qusp is offline qusp  Australia
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yes Dirk, but the actual working voltage of batteries IS pretty stable and does not vary anywhere near that much. most batteries will drop fairly rapidly from their fully charged state (which is above the nominal voltage) in the first short while, then remain pretty steady for ~75% or more of their charge, dropping a fairly small amount, then drop rapidly again at the end of their cycle.

At such low discharge rates as we are using here, they are MUCH more flat again; use them within their plateau and cut off before the sharp drop.
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Old 30th July 2012, 03:21 PM   #1087
heb1001 is offline heb1001  China
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Quote:
Originally Posted by EUVL View Post
To be honest I am not surprised at all.

I do not consider it necessary to use a source follower to drive the gates.
Tying them to Gnd or to the Vref divider for ES9018 as I posted is low impedance enough.
You made thing worst by running the Source Follower off the floating PSU.
This introduces an additional capacitive path of current to Gnd as the rail swings with signal.
This was not there originally and IMHO destroys the beauty of the circuit.

If you have to do this then the source followers should have split-rails referenced to Gnd, meaning yet more additional power supplies.

But for an academic experiment, I thought it would make a good exercise.
Just to show you simulation does not replace human thinking.


Patrick
The plan with #998 was to take the gate leakage current of the earlier JFETs and feed it back into the last pair of JFETs which work like another small Sen instance to convey the gate leakage current of the earlier JFETs into Riv leaving only the gate leakage current of the last JFET which is much smaller anyway because the voltage across that gate doesn't swing so much. Thus running the last pair off the same floating PSU was intentional.

I think it's quite elegant ;-) and I think the simulation results show that it does work to reduce distortion (-200dB 3rd with 256R Riv).

I think it sounds bad because the bandwidth is too wide - simulation shows 100MHz - so I think it just passes all the DAC noise and it's probably picking up RFI too. I can't measure anything above 96kHz so I don't know.

Maybe it could be tweaked for success with a capacitor somewhere. Civ is too late - for a circuit to sound good I think you need to stop inaudible frequencies from getting into it rather than filter them out afterwards.
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Old 30th July 2012, 06:14 PM   #1088
bcarso is offline bcarso  United States
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Quote:
Originally Posted by heb1001 View Post

I think it's quite elegant ;-) and I think the simulation results show that it does work to reduce distortion (-200dB 3rd with 256R Riv).
Your sim results will be very good with current sources as inputs. Unfortunately, they will also bear little relevance to actual use with DACs, whose "current outputs" can be as low as a few hundred ohms, and moreover may interact with the codes. Also, cancellation of even-order is fine and dandy, but its efficacy depends very much on component matching. In addition, I doubt that the models include signal-induced self-heating, which will spoil things well before -200dB is reached.
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Old 31st July 2012, 02:16 AM   #1089
heb1001 is offline heb1001  China
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Originally Posted by bcarso View Post
Your sim results will be very good with current sources as inputs. Unfortunately, they will also bear little relevance to actual use with DACs, whose "current outputs" can be as low as a few hundred ohms, and moreover may interact with the codes. Also, cancellation of even-order is fine and dandy, but its efficacy depends very much on component matching. In addition, I doubt that the models include signal-induced self-heating, which will spoil things well before -200dB is reached.
I measured -100dB for 2nd and 3rd on the real #998 circuit which seems to be the limit of the analog part of my measuring circuit - so it works OK (apart from the sound!). I wasn't expecting to achieve -200dB; I just wanted to fix the distortion of Sen at high frequencies. #908 works for this and sounds good (at least with 1.2k RM which I still have left over from experiments with #998).

I think maybe a resistor (10k ish) between the gates of the first set of JFETs and the last pair might fix #998.
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Old 31st July 2012, 02:31 AM   #1090
bcarso is offline bcarso  United States
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Do you know what the output impedance of the DAC you are using is?

I do like the idea of correcting for displacement currents in the basic input section without requiring additional voltages. But the problem the approach poses for matching is formidable.

I will post soon, probably in a separate thread, on a repurposing of some of the parts, along with cascode structures, which seems to my Mahayana sentiments, still pretty Zennish. And it's all free range NJFET

Brad
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