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Old 24th August 2003, 09:33 PM   #1
andrei is offline andrei  Canada
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Default Completed - NPC SM5847/SM5865 DAC

Here is my latest DAC project - built and tested . It uses the latest and greatest NPC chipset - SM5847 digital filter and SM5865 delta-sigma DACs.
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Old 24th August 2003, 09:37 PM   #2
andrei is offline andrei  Canada
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Schematics and parts list are attached. More details can be found in an earlier thread.
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Old 29th August 2003, 12:22 PM   #3
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Default NPC SM5847/SM5865 DAC

Congratlations Andrei , I like it a lot, it is a
good work in the schematics an pcb rules,
Tell me how it is the sound.

Jess
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Old 29th August 2003, 12:41 PM   #4
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Very nice pcb work indeed.
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Old 30th August 2003, 06:20 PM   #5
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Cool
How will you estimate these NPC SM5865 DACs on a sound in comparison with others similar DACs?
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Old 30th August 2003, 06:38 PM   #6
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Default Nice JOB

Is the PCB double sided. The solder job look good from the picture, did you do it by hand.

Very Good.
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Old 31st August 2003, 08:53 PM   #7
andrei is offline andrei  Canada
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The PCB is 8x10cm, double-sided, solder mask over silver-plated copper (manufactured by Custom PCB). Soldering was done by hand. (I actually find surface mount components faster and easier to work with than through-hole. Less operations involved - no forming the leads and nipping them - just place and solder.)

About the sound:

I did a bit of listening (running from battery power) of different sources - 44.1kHz CD, 48kHz DVD, 24/96kHz DVD Audio. Overall first impression is quite good. Noise floor is very low and sounds white. In the quiteness, small details come through, and the dynamics is striking. Stereo imaging is good and effortless. Sibilance is controlled. I think I like this DAC better than PCM1730 design I've done before... In any case, it is clear now that SM5865 are decent chips .

There is the usual flaw in this design - transport/interface jitter attenuation in audio band is non-existant. I am now inclined to think this is the primary cause of "digital fatigue" in most DACs. In the next iteration, I will implement PLLed VCXO clock recovery and see if it helps...
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Old 2nd June 2004, 03:16 PM   #8
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I email'd you on this Andrei, but did you ever see this project through to a finished revision to your satisfaction? If so do you have a spare PCB I could buy?

Regards

Anthony
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Old 12th June 2004, 08:09 PM   #9
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Very nice design. I also applaud your usage of diff amps. Regarding that, I have one question:

What is the voltage level at IoutA? I am assuming it is zero (or Ioutaverage*4K7), but I expect the DAC would want it to be VCC/2 for optimal operation of the DAC unit itself.

My reason for asking is that a lot of DAC units want the DC level of the output current to be at VCC/2 hence the use of "instrumentation amplifiers" at the output as per the datasheet reference implementation.

I am not sure about this, hence my question.

Your answer to this question will be highly valuable to me.

Petter
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Old 13th June 2004, 07:18 AM   #10
andrei is offline andrei  Canada
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Quote:
What is the voltage level at IoutA? I am assuming it is zero (or Ioutaverage*4K7), but I expect the DAC would want it to be VCC/2 for optimal operation of the DAC unit itself.
The voltage level at Iout pins is indeed Vcc/2. Internal voltage divider references Vocm input of the differential amplifier midway between the rails, which are 0V and 5V. The catch is that output of the differential amplifier is also referenced to Vcc/2. This is pretty much unavoidable in single-supply system, but output transformer will solve that (and a few other ) problems.
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