Hi
apassgear
Call me as you would like.
AD1865 does not require 16... Mhz clock, because it is R-2R DAC.
Use external I/U converter.
And there are ideas. Try to apply a galvanically isolated
data coupler between DF and DAC, and completely to untie the digital ground, and the ground DAC and analog stage. It will require such devices as ISO150 (TI, 80Mbps) or ADuM1100BR (ADI, 100Mbps). The samples is free. The additional transformer and regulators for the analog parts power supply also is required.
If the main clock generator to arrange on the analog part, that is well, it is possible to apply the synchronous reclocking by D-flip flpops, before submission of signals on DAC IC, that is even better.
Regards.
apassgear
Call me as you would like.
At first be convinced precisely, that there is an external generator. NPC DF and DAC usually have the built - in generators and require only external crystal quartz oscillator, on DF or on DAC (it`s often). Also both of them allow to use external clock, that is better. If the external generator is submitted, it is OK.apassgear said:
AD1865 does not require 16... Mhz clock, because it is R-2R DAC.
Use external I/U converter.
And there are ideas. Try to apply a galvanically isolated
data coupler between DF and DAC, and completely to untie the digital ground, and the ground DAC and analog stage. It will require such devices as ISO150 (TI, 80Mbps) or ADuM1100BR (ADI, 100Mbps). The samples is free. The additional transformer and regulators for the analog parts power supply also is required.
If the main clock generator to arrange on the analog part, that is well, it is possible to apply the synchronous reclocking by D-flip flpops, before submission of signals on DAC IC, that is even better.
Regards.
Hi
kello
AD1864 was stopped to manufacture five years ago.
What for are so a lot of caps near regulators? Only two caps are required on one reg. (on input and output ) and the everyone cap required the small HF bypass cap) .
All other capacitors (cap+bypass cap) should be located as close to the appropriate power supply pins of the ICs as possible to reduce noise pickup from surrounding circuitry.
Regards
kello
AD1864 was stopped to manufacture five years ago.
What for are so a lot of caps near regulators? Only two caps are required on one reg. (on input and output ) and the everyone cap required the small HF bypass cap)
.All other capacitors (cap+bypass cap) should be located as close to the appropriate power supply pins of the ICs as possible to reduce noise pickup from surrounding circuitry.
Regards
tbla said:
you will use the opa660 and then perhaps an ext. buffer - a drv 134 perhaps.....
If the internal I/V of the chip is no good I will most probably go to the OPA660 I/V you know.
The DRV134 buffer is new to me, is this better than OPA634?
Who manufactures the DRV134?
Thanks for your input, I look forward on your comments...
Õàëÿâùèê said:
Hi Haly,
For both English is not our mother language so we will do as best as we can.
You give a lot of good ideas, let's see:
First the clock thing, The original clock at the PCB, the 16... MHz, connects also to a (flip flop?) 74HCU04AP and from there to the DAC's etc. Dificult to explain but if you have means to open a zipped file I may be able to send you the schematic that was kindly offered by another member to me.
Anyway, if I did understand you correctly I shoul leave the original 16 MHz cristal connected to the SM5813 DF as is and I should not add a connection to the New DAC (1865). And connect the BCKO WCKO from the DF to the DAC as shown on the AD1865 Data Sheet example schematic. OK?
Now on the isolators ISO150 or the ADI device, I will have a look to the data sheets for these. What would this accomplish? Would they reduce jitter?
So your recomendation is using an outboard I/V, so I will. Seems that all will think the same as Tbla did.
Thanks a lot for your orientation Haly
Hi
apassgear
The good schematic offers Guido Tent. But I think, 74F74 is better, than AC è ÍÑ. F-series have very low noise level and its own jitter is very small.
16,9344MHz is necessary to connect to clock input of D flip flop.
The DF and Decoder (servocontroller) require this clock (16...Mhz) always, but AD1865 it is not necessary, because it does not contain the deltasigma modulator, as against SM`s DAC.
Reclocking is necessary to make in case of presence of the very good generator, and it never happens superfluous.
ISO and ADuM allow to full get rid of RF-noise by the digital ground from the servo, decoder and DF to DAC.
Ideally is so.
DAC and clock oscillator on analog ground
DF, decoder, e.t.c. on Digital ground
16...MHz clock is connected to the D- flipflops for reclocking WCKO, dataR, dataL, BCK and also connected, through ISO, to the digital part to DF and decoder.
WCKO, dataR, dataL, BCK is connected through ISO to D- flipflops.
After flipflop these clean and jitter-free signals moves on DAC.
Regards
apassgear
The good schematic offers Guido Tent. But I think, 74F74 is better, than AC è ÍÑ. F-series have very low noise level and its own jitter is very small.
16,9344MHz is necessary to connect to clock input of D flip flop.
The DF and Decoder (servocontroller) require this clock (16...Mhz) always, but AD1865 it is not necessary, because it does not contain the deltasigma modulator, as against SM`s DAC.
Reclocking is necessary to make in case of presence of the very good generator, and it never happens superfluous.
ISO and ADuM allow to full get rid of RF-noise by the digital ground from the servo, decoder and DF to DAC.
Ideally is so.
DAC and clock oscillator on analog ground
DF, decoder, e.t.c. on Digital ground
16...MHz clock is connected to the D- flipflops for reclocking WCKO, dataR, dataL, BCK and also connected, through ISO, to the digital part to DF and decoder.
WCKO, dataR, dataL, BCK is connected through ISO to D- flipflops.
After flipflop these clean and jitter-free signals moves on DAC.
Regards
Õà?âùèê said:Hi
kello
AD1864 was stopped to manufacture five years ago.
What for are so a lot of caps near regulators? Only two caps are required on one reg. (on input and output ) and the everyone cap required the small HF bypass cap)
All other capacitors (cap+bypass cap) should be located as close to the appropriate power supply pins of the ICs as possible to reduce noise pickup from surrounding circuitry.
Regards
Hi! My fan.
for you quition:
I using array Cap for power supply, is think about the sound quality type balance and control.
All the supply is separate,7805 one for DIR and DigitalFIR.two and two 7905 for DAC +5V digital and Analog.LM317T/337T for GIC FIR and analog buffer out.
20pcs ELNA DuorexII audio serial 16v/220u Cap,6pcs for Digital and 6pcs for Analog. other 8pcs for analog buffer supply (+/-12V)
20Pcs(4 x 5 pcs) SAYON OS-CON SL serial 150u/6.3v solid Cap for DAC supply.
In all the supply path, every one have a high quality 1208type SMD cap in the pin contact( in bottom,very close the IC supply pin)
All the supply path is short and not too long send for all uint with wide wire in bottom layer.
all supply design think about the audio quality and better SN peroformance.
in the DAC board, the SN performance is very good,Can't hear any
noise in high output (- infinity digital CD single test). in test record good than -102dB about -106dB, test show one channel is difference 2~4dB
(using HP8903B audio analyzer)
the sound type of this DAC is shape, Clear than PCM63K, but Voice the PCM63K is good than.
Attachments
Õàëÿâùèê said:
Hi Haly,
lets see if I understand you correctly, going on the order of your post:
My guess is that your reffering to Guido Tent's clock schematic, I will go and see this schematic and see if you are refering here to the Clock flipflop. As I said before the clock flipflop on the original Onkyo PCB is a 74HCU04AP, is this no good and need to replace it? Can you suggest a couple of # from TI and AD offerings?
Next, on D flipflops I think you are now reffering to the connections between DF and DAC as your previous post suggestion. On this you are saying that I should connect the clock output for the reclocking purpose which I understand
Could you suggest a couple of # on TI and AD offerings for this application?ISO isolators are also understanded (good lord!).
I'm sure it will be easier for you to explain if you had the original schematic of the Onkyo, I will be happy to send it to you if you can give me your e-mailing address.
Thanks for your input, think I'm getting on the road to a very good upgrade for the CDP!!!
Re: Re: Re: Re: The AD1864NK good than AD1865
Yes, My DAC without any output caps.the DC voltage is -2/+3mV in normal operation temperature range. normal time, many preamp or Poweramp have the DC cut Cap, so DAC the cap can remove no problem is OK.
for the DC output performance, I control accuracy of all component is very important ,the power regulate out unbalance <0.1V, the resister <1% and transistor HFE<5% too.
apassgear said:
Yes, My DAC without any output caps.the DC voltage is -2/+3mV in normal operation temperature range. normal time, many preamp or Poweramp have the DC cut Cap, so DAC the cap can remove no problem is OK.
for the DC output performance, I control accuracy of all component is very important ,the power regulate out unbalance <0.1V, the resister <1% and transistor HFE<5% too.
Hi
apassgear
I spoke about Guido Tents schematic of recloñking.
http://members.chello.nl/~m.heijligers/DAChtml/dig_r2a.pdf
svinyara (NO SPAM) mail.ru
apassgear
I spoke about Guido Tents schematic of recloñking.
http://members.chello.nl/~m.heijligers/DAChtml/dig_r2a.pdf
To change the inverter is useless. Better to put instead of it the good generator and separate transformer for its power supply.
Usual logic IC are a lot of in anyone store, I never was interested whether manufactures them TI.
svinyara (NO SPAM) mail.ru
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.