Discrete DAC i/v stage

[bocka]

Originally Posted by Marek

I'm not sure that we understand each other.
I try to say that outputs od AD1853 are not current source, but sink.

Hi Marek,

yes I understood what you was trying to say. The first stage with T8/T9 is able to source and to sink about +/-4 ma into I+ and I-. As long the most positive and the most negative current is within this range, everything will work fine. But you're right, the current source in the netlist is modeled in the wrong way. In my understanding postive current is defined as current flows into a two-pole (in this way positive power will be dissipated), spice does it vice versa:

Positive current is assumed to flow from the positive node, through the source, to the negative node. A current source of positive value, will force current to flow out of the +node, through the source to the -node.

I've overlooked this (I simply used the values from the AD1853 datasheet). When I change the offset to -1ma there is not change in the output behaviour, so it's not worth to post the results. You can also build a complement type of the i/v converter (change NPN to PNP, PNP to NPN) and the circuit will work the same.

[Marek]

I'm glad that you relise that. I was very confused when I tried to change my old OPAMP based output stage with passive one (tansformer). It was no signal and I didn't know why (datasheet seems to conceal this..)but when I exidently connected it not to ground but to Vcc - EUREKA!

good luck with you project!
Marek

[sidiy]

Hello again,
Running the buffers at Idss is not a really good way of doing the job. Using 'V' types with 22ohms source resistors will drive most typical loads at full swing while still in classA.

Of course using these gives higher outputZ (around 50ohm) and will change a bit the AC analysis posted earlier.

[bocka]

Hi sidiy,

2SK170V types are unavailable today. The only ones I can get are 2SK170BL. But I cannot see why the running buffers at Idss is not a good way.

[sidiy]

Let's start at DC...there will always be some -200mV needed on the conversion resistor. Then the servo will chase it's tail a lot because of thermal mismatches...etc.

[bocka]

Originally Posted by sidiy

...there will always be some -200mV needed on the conversion resistor. Then the servo will chase it's tail a lot because of thermal mismatches...etc.

For the 2SK170 I dont think so (although I haven't tried this until now. I'll do this the next few days). dVgs = 200mV means more than worst case condition for the given IDss range. At 9mA a 2SK170 has a transconductance of about 40mS. For +/3ma current drain change will need about 40mS / 3ma = +/- 0.075V on Vgs. The same order can also read from the Vgs vs. Id graph from the datasheet.

Thermal mismatches are also minimised as the jfets run in single ended class a. For the servo the same problem are mismatches between the biasing resistors R17/R18, R1/R2 and R19/R20 will lead to the same order of imbalance on the conversion resistor. As the current through T6/T14 is about 5ma, only 1% imbalance results in 50ua * 1k8 = 90mv offset.

But you are right, the servo resistors R3/R4 are a little bit on the high side.

[jeepee]

Hi Bocka,

I simmed a bit more on your circuit. I noticed quite some current through the diode string and the VREF transistor; (18V-2.7V-3*1.8V)/1k=10mA. What is the reason to use so much current on the biasing? I figured if you put 2 more LED's in the string, you can lower the base voltage of T5/T6 and increase the resistors R1/R2 (1k2) to lower the noise. I also increased the voltage drop accross R19/R20 (1k8) to further reduce noise. I got the noise down from 25nV/sqrtHz to 17nV/sqrtHz at the output node. Voltage headroom is still sufficient @ Idac_max. The 1st resistor in the Bessel filter is also quite high.

The noise contributed by the I2V resistor (1k8) was only 4.4% with your original values, now it is 10%. So there is still room for improvement ;-)
[R1/R2 & R19/R20 are still 50% of all noise]

[jeepee]

Here are the distortion simulations from your original circuit with a 1kOhm and 10kOhm load. I swept the DAC current from 15uA to 1.5mA (=3mApp differential=AD1853 full scale current). As you already mentioned, 1kOhm is a but too much for the JFET buffer. The distortion on the output (node 'out') is an order of magnitude worse then on the JFET input (node 'mid'). 10kOhm load is fine though and quite comparable to the numbers you quoted.

The 2nd picture shows the harmonic composition of the distortion (left) and the trans-resistance; the harmonic transfer from input current to output voltage. Harm='1' is the 1k8 I-to-V resistor.

[bocka]

Originally Posted by jeepee

Hi Bocka,

I simmed a bit more on your circuit. I noticed quite some current through the diode string and the VREF transistor; (18V-2.7V-3*1.8V)/1k=10mA. What is the reason to use so much current on the biasing?

LEDs are shining bright at that current...

There's not really an absolute value for that current. The higher the current, the lower the dynamic impedance for a diode is. As this diodes inject some noise I woudn't go for a to too small current. The optimum value is the current which also flows through T8/T9. When the NPNs and PNP have equal Vbe voltages the voltage on I+ and I- is the same as Vref. But I haven't calculated it. Just an ingenious value ;-)

I found the jfet buffer can drive a 5k load without any increase in distortion. If you want to drive a lower load this single jfet is not sufficiant.

The bessel filter is somewhat unconventional. The reason is I want to get the highest possible value for C1 as the nonlinear Cgd (about 6pF for each fet) is parallel to C1 and this leads to all kinds of distortion on higher amplitudes and frequencies. As I've got some problems to simulate the group delay in the past days I had to contact the software distributor first how to do it. They respond this morning and I simulated a nice 3us group delay so the calculated values are correct.

I think there are always some noise improvement possible. But as the noise figure is only 3dB I want to optimize the pcb first. The i/v converter is only a small part of the DAC, which has some hundred components

[binspaul]

Any updates ?