How does a delta sigma DAC work?
I've seen how a R2R dac works, but not for delta sigma ones
can someone explain me?
Re: How does a delta sigma DAC work?
Re: Re: How does a delta sigma DAC work?
They sure are very complex ! I never bothered to understand them thoroughly ( to me they're all 1 bit :yuck: ) as I yet have to hear one that sounds better than those plain old R2R DAC chips :D
MASH/Bitstream/Delta Sigma : the names are nicer than the sound they produce...
Phillips called Bitstream to their 1-bit dac technology.
Crystal calls theirs Delta-Sigma.
Technics/Panasonic (Matsushita) calls it Mash.
All fancy names for basically the same thing.
Re: Re: Re: How does a delta sigma DAC work?
Panasonic MASH drives me out the room, Sony is ok, and Philips quite good, and all are different to R2R.
Re: How does a delta sigma DAC work?
So please, for all those who know it all and have not bothered to explain, note the context of the writing and save your extended criticism of specific points. I do know it just as well (but for simplicity will not cover it) and on most people who basically just ask "how does it work" the finer points will be mostly lost.
Okay. Now to approximate a given analogue waveform (you can never do more than that with digital) we can represent the waveform as a sequence of numbers.
An R2R DAC will take such a number and turn it into a current, by so to speak throwing a suitable number of switches that cause each a certain amount of current to flow, the switches being encoded binary, so that a given "number" can be translated directly into an analogue signal.
In order to make this work well our various forms of current switches and current dividers need to be jolly accurate, 16 Bit precision in micxed signal silicon is not that easy, 20 Bit becomes real hard, 24 Bit is definitly "G*d's domain".
But we can actually represent our waveform in another way. In the simplest way lets take a clock of 200KHz. If we divide this clock by a factor 4 we have now a square-wave with 50KHz frequency and each "Hi" or "Lo" lasts for four cycles of the 400KHz clock.
NOW, what if put in a locgic that allows ups to change the length of the "Hi" or "Lo" section in each cycle from 0 to 4 cycles of the clock.
In the most extreme case in each 50KHz full cycle the output of our logic remains "Hi" (or to say it remains "Hi" for 4 cycles of our original 200KHz clock), giving an output voltage for usual 5V Logic of around 4.5V and DC at that. Equally if our logic remains "Lo" for the full cycle our output voltage is around 0.5V and DC at that.
What if we chose an intermediate length of "Hi" and "Lo". Say we go back to equal cycle length for "Hi" and "Lo". Our output is now again a 50KHz squarewave, "Hi" for two cycles of the 200KHz clock and "Lo" for the other two cycles.
BUT, if we lowpass filter this squarewave out we are actually left in our case with an output Voltage of 2.5V and pretty much DC at that. If now make the "Hi" section 3 cycles of our 200KHz clock and the low section 1 cycle long and lowpass filter our 50KHz clock out, what will be the voltage measured on the output of our logic, yup, 3.5V. And if we keep the "Lo" cycle for three cycles of our 200KHz clock and "Hi" for one cycle we have 1.5V DC output.
What we have just made is the most primitive Delta Sigma DAC possible. It allows us to adjust the output Voltage of our logic from 0.5V in 1V steps to 4.5V, equivalent to a 2Bit "multibit" DAC.
Now if we increase the ratio between our main clock and the final sample clock (which in the above case BTW would be 50KHz) higher we can encode more bits. For example, doubling our main clock to 400KHz for a 50KHz clock gets us up to an effective 3Bit DAC, going up to 800KHz makes it a 4 bit equivalent, 1.6MHz makes it 5 Bit, 3.2MHz makes it 6 Bit, 6.4MHz makes is 7 Bit and 12.8MHz makes it 8 Bit.
Another way of describing our "primitive" delta sigma DAC is to call the operation "Pulse Width Modulation" or "Pulse Density Modulation". In fact, the recently again fashionable "Class D" or "Class G" Amplifiers operate in such a mode. I experiemnted with a fully discrete PWM Amp in the late 1970's, it has a way too slow clock (only 200KHz) and sounded pretty bad, but it "sort of" made music.
BTW, I hope that people have noitced that our "DAC" has a direct voltage output coming directly from a CMOS Gate or inverter. I hope also that it is noted that PSU voltage plays it's role here. And I hope it is very clear what influence Jitter would have on such a DAC.
Now, most commercial "delta sigma" DAC's operate at 256 to 512 times the sample clock. If we rely purely upon the pulse width modulation possible by adjusting the "Hi" or "Lo" period of the delta sigma modulators output to integer multiples of main clock, we can literally infer the the possible resolution of the DAC by comparing the main clock frequency with the Sample frequency.
If the Delta Sigma modulator operates at 256 times the sample rate we have 8 Bit effective resolution, if it operates at 512 times the sample rate we have 9 Bit and at 1024 times the sample rate we have 10 Bit.
To get the equivalent of 16 Bit resolution we would have to operate at a whopping 65536 times the sample rate, for 44.1KHz that would be around 2.89GHz, a clockspeed quite possible for modern Pentium and similar CPU's, but clearly outside the range for an "economy" DAC.
So, how do we reconcile a DAC capable of 8-10 Bit resulution and an Audio Output claiming 16, 18, 20 or even 24 Bit equivalent resolution? The "magic word" is called noiseshaping. It is literally "magic". How so?
What noise shaping does is to modulate the signal fed to the Delta Sigma Modulator in such a way that quantitasation noise from effectively truncating the data to 8..10Bit is pushed to outside the Audio range. So, the horrible distortion from the truncation is still there, but is no longer observable, after applying a suitably steep (usually 5th - 7th order) analogue filter after the DAC.
How exactly (their) noiseshaping works is one of key secrets of DAC makers. I'll not go deeply into noiseshaping, it's a fun topic and one that makes the Valves vs Solid state debates look harmless.
However, in truth, even with noiseshaping the results where not always so hot (measured and sonic), so the various delta sigma DAC's where for a long time consigned to "lo-fi" applications. Better noiseshaping algorythms and the introduction of "multi-level" delta sigma modulators changed the picture.
Oh yes, a "multi level delta sigma modulator" is nothing more that a multibit DAC being combined with clockcycle modulation and noiseshaping. But even a 2-Bit (4-level) multilevel Modulator would give 2-bit more real resolution and hence less agressive noiseshaping was needed. Certain manufacturers produced quite decent 2nd generation DS Chips, such as the NPC SM5864 and SM5872 or the Cirrus Logic (aka Crystal) CS4328.
While NPC provided a near raw PWM/PDM output Cirrus Logic integrated a switched capacitor filter on chip, making sure that even the daftest engineer couldn't balls up the design. The strong ultrasonic content in the output of a Delta Sigma DAC makes many a non-oversampling DAC look quite decent. Since then, just to prove that most EE's are daft, DS DAC's all come with on board switched capacitor filters and on-board buffer Op-Amp's making sure no-body can make a big cockup, but also disallowing the more competent engineer any control over the analogue filtering and analogue stage quality.
In recent years the number of Bits in the Multilevel Delta Sigma modulators have continously increased. The dCS Elgar operates it's core IIRC at 1024 times sample frequency and has what amounts to a 5 Bit Multibit DAC, so without noiseshaping we already have 15 Bit real response, if we add the 8 Bit that earlier DS DAC's needed to "noiseshape" we have theoretically around 23 Bit performance.
The Burr Brown PCM1738 operates it's core at 64 times Fs and has what amounts to a 7 Bit equivalent Multilevel Modulator, while the Cirrus CS43122 "SOTA" DAC has what amounts to a 6-Bit Multilevel DAC section with the modulator core operating at 128 times Fs (for 48Khz or lower Fs), both yielding 13 Bit effective resultion before noiseshaping.
Sony's DSD used for SACD operates very similar too.
The "latest and greatest" PCM1792 from BB/TI seems to combine a multilevel DS Modulator with a further Multibit current output DAC after that (not sure how they make that work, might have to look at that).
So, I hope this gives some Idea of what "Delta Sigma" DAC's do and how, plus also the fact that few currently made socalled "Delta Sigma" DAC's are such, in the purest sense of the word.
The hybrid combination of high speed, medium bitdepth video DAC Chips (12-Bit ones are available) combined with pulse density /pulse width modulation may be the way forward for the "High End", if a high performance DAC is desired without agressive noiseshaping.
Using a single 12-Bit Video DAC with a main clock at 1024 times Fs (around 200MHz clock) would allow around 22 Bit equivalent resolution. By using multiple "interleaved" converters (luckily Video Converters come already in packs of three or more per chip) and/or massive parallel arrangements of such DAC's it should be possible to push close to the performance that for pure analogue means remains "G*d's domain" and to do so without requiring oversampling with digital filters in the traditional sense. Then of course we would need equally good ADC's...
Whao, thanks a lot!
That's very well explained :) (I suspect Kuei Yang Wang for being the writer from the books called "Idiots guide for ..." :D)
As delta sigma DACs are a kind of PWM, where does theyr name come from? Do they have a kind of mathematical operation in them, such as a derivation?
"The strong ultrasonic content in the output of a Delta Sigma DAC makes many a non-oversampling DAC look quite decent"
Wouldn't it be the opposite? Since you have HF output, non os would not be a good idea.
Where does this ultrasonic content come from? Isn't the 5-7th order lowpass enough to filter it?
Does this say that R2R DACs haven't any HF on the output? Making them more suitable to a non os DAC?
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