MicroSD Memory Card Transport Project

Dear RayCTech,

Your discussion in theory is completely correct. I2S has a fatal defect.
My technical background is in a computer science. No data transmission without error corrections can be acceptable in the field in principle.

Therefore, we must do our best for eliminating transmission errors in I2S. In my system where SDTrans192 Rev. 2.1 that you kindly upgraded power supplies for us is connected to TPA Buffalo II via I2S. The wires are shielded and wire length does not exceed an inch.

I can prove that absolutely no errors that you worry happen in my system.
If any erroneous bit flip occurs so frequently, you will always detect a large spike noise. You might easily think the system would be defective. I have never heard such spike noises.

Lets say that we will send 10,000 samples:
1. A zero sample at -96.3dB. 0b0000000000000000
2. A zero sample at -96.3dB. 0b0000000000000000
....
10000. A zero sample at -96.3dB. 0b0000000000000000
When
50. A zero sample at -96.3dB. 0b0000000000000000
is mis-received as
50. A negative sample at 0.0dB. 0b1000000000000000

If the erroneous bit flip occurs so frequently, every datasheet of receiver chip would excuse, "We handle data errors in this way, ....". Have your ever read such descriptions?

If you want to argue your point, please show us your clear actual recorded and reproducible evidences that bit flip errors happen during I2S connection.

Bunpei

:D you rules by confusion :D
 
I2S specification

Before I explain Chiaki's approach on
"2. handling of BCLK signal"
I want to talk about I2S bus a little bit.

According to Wikipedia,
I²S - Wikipedia, the free encyclopedia
"I2S, also known as Inter-IC Sound, Integrated Interchip Sound, or IIS, is an electrical serial bus interface standard used for connecting digital audio devices together."

In the case of S/PDIF, it is standardized in IEC 60958 as IEC 60958 type II (IEC 958 before 1998[2]).
As for I2S, though it is a de facto industry standard, it is not a standard that was standardized by an international standardizing organization. You can read its specification originally published by Philips.
http://www.nxp.com/acrobat_download/various/I2SBUS.pdf
This is the last revision dated June 5, 1996.
I'd like to recommend that you read the spec when you talk about I2S in an engineering context.

In my several experiences of using I2S, I have encountered some incompatibilities on
A. Master clock
B. Bit Clock(SCK) rate
C. Voltage level
As I2S is not a solid, well-defined specification like S/PDIF, you need to pay attentions to the points above proactively so that you may avoid possible problems on I2S. First of all, names of signals vary depending on each manufacturer.

A. Master clock
Strictly speaking, a master clock signal is not included in I2S. However, some DAC chips require a master clock that is an integer multiple of sampling frequency, fs, namely, Word Clock frequency. A master clock is used not for sample timing control but for a fundamental system clock for such internal circuits as DSP function for oversampling filtering.
A frequency requirement for master clock is usually fs dependent. The more you apply high resolution audio sources, the more you need a high frequency master clock. Even if your DAC chip could play sounds with lower frequency master clock than required, the under-run malfunction would happen in OSF.
In the case of ESS ES9018, its master clock frequency and timing can be independent from fs because the DAC adopts an asynchronous data processing scheme. For this chip, the accuracy of master clock is very important when we want to get a high quality sonic result.

B. Bit Clock(SCK) rate
Frequency requirements I have ever seen for Bit Clock is either 32*fs or 64*fs. The former is only applicable to 16bit LPCM data and the latter is to 16, 24, 32bit. I have never seen 48*fs specific to 24bt.
Our first MicroSD memory card player that Chiaki made with VS1053b chip outputs only 32*fs. SDTrans192, 64*fs only. ESS ES9018 DAC chip accepts 64*fs only. Wolfson WM8741 accepts both 32*fs and 64*fs.
Therefore, ES9018 can't be connected to VS1053b output while WM8741 can be connected to VS1053b and SDTrans192. You can't connect SDTrans192 to 32*fs-accepting-only DAC chip.

C. Voltage level
Strictly speaking, the original I2S specification only refers a TTL logic level. Nowadays, most of DAC chips available are compatible to a CMOS logic level.
SDTrans192's I2S direct output is CMOS logic level compatible.
SDTrans192 Rev. 3.0 has PS-Audio type I2S interface, "I2S on LVDS/HDMI connector and cable". On this interface, its voltage level is LVDS, differential.This new interface is compatible to Fidelix CAPRICE DAC and PS-Audio PerfectWave DAC.
 
352.8 kHz/24 bit play on AK4399 DAC

In "Digital Line > exaU2I - Multi-Channel Asynchronous USB to I2S Interface" thread, SanRa first reported that he could play 352.8 kHz audio files on AK4396 192kHz/24bit DAC connected to exaDevices exaU2I interface via I2S.

I tried playing 2L DXD audio files on AK4399 192kHz/32 bit DAC (built in AKD4399-SB evaluation board) using my SDTrans192 Rev. 2.1 and could confirm quite similar results reported by SanRa.
He described the noise that he listened as "hiss" while I'd like to call it "continuous noise". The noise gave me similar impression that I got when I played DXD files with ES9018 of 80MHz master clock.

I believe 2L DXD audio files are "genuine" DXD sources.

I agree with RayCTech's interpretation presented on the exaU2I thread.
As the master clock frequency 22.5792 MHz is a half of the value extrapolated from datasheet value for 176.4kHz, I am afraid that the 8 x oversampling filter in the DAC chip is under-running for 2L DXD LPCM data. This may cause the noise. When I played synthesized sine waves, I had no noises.
The trial of using 45.1584MHz master clock seems interesting.

Anyway, I understand that a sort of "genuine/faked DXD source checker" was discovered by SanRa and RayCTech.
 
Importance of Bit Clock signal of I2S

Among three signals in I2S, Bit Clock Signals has the highest frequency. In the case of 352.8 kHz/24 bit, its frequency, 22.5792 MHz, is the same with that of crystal oscillator source. On such a HF range, it's not easy to maintain a good square shape along with its signal path.
Chiaki prepared two paths in FPGA, one is of the least involvement in gate logic circuits in FPGA and another is not the least. We agreed that the former brought a better result.

When we connect I2S signals to ESS ES9018 DAC chip, the quality of Bit Clock is very important because the chip uses Bit Clock for its DPLL functionality. In other words, DPLL bandwidth parameter setting for the DAC chip can be a quantitative measure of quality of the Bit Clock.

A Japanese SDTrans192 Rev. 3.0 user, sunacchi, upgraded power supplies for his SDTrans and achieved a practical setting with "the lowest" bandwidth even on the play of 2L DXD 352.8 kHz/24 bit sources.
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His Buffalo IIs are configured in Dual Mono mode and controlled with Arduino.
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DAC used in your pdf is PCM1744 .

PCM1744 dac can do 96K , no more . Look to its pdf :

http://focus.ti.com/lit/ds/symlink/pcm1744.pdf (page6)

It simply can't accept 16bitx2 I2S , NO WAY ! Just 32x2 frame like all other chips arround .
Yes , valid data can be only 16bit with lower bits set to 0 , but frame must be still 32x2 .
If you are talking about other possible formats like Right Justified , Left Justified or blablabla company justified , yes it can be true . Even 8 bit x 2 can be true . But not for I2S . Its just 32x2 by default , sorry .
 
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.... , but frame must be still 32x2 . ... Its just 32x2 by default , ...
On which documents are your beliefs based on?
The only one that I know is this;

http://www.nxp.com/acrobat_download/various/I2SBUS.pdf

I found no description that tells 32x2 is a default or mandatory here.

On the other hand, when we think of actual DAC chip products, I think it's true that almost all of them are designed to accept 64*fs Bit Clock.
 
Delivery announce of SDTrasn192 Rev. 3.0 for oversea orders

Within two weeks, Chiaki will release a batch assigned to oversea orders of SDTrans192 Rev. 3.0.

Bunpei will individually send an e-mail of requesting payment to those who have made a reservation for SDTrans. If you receive no e-mail from him by May 10th, please send your e-mail of reconfirmation to him.
 
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Great news!!!

I look forward to my email


Best regards,
S

Within two weeks, Chiaki will release a batch assigned to oversea orders of SDTrans192 Rev. 3.0.

Bunpei will individually send an e-mail of requesting payment to those who have made a reservation for SDTrans. If you receive no e-mail from him by May 10th, please send your e-mail of reconfirmation to him.
 
SDTrans appeared in hifiduino blog pages

On a very smart, exact and useful blog, "HifiDUINO" by hiBlogGeanD, two types of SDTrans were introduced.
(The author is also an active poster of this diyAudio Forum.)

1. SDTrans192 Rev. 3.0 Evaluation by hiBlogGeanD
HiRes SD Card Player: SDTrans192 v. 3.0 H i F i D U I N O
Further Experimenting with SDTrans 3.0 H i F i D U I N O

I'd like to express my sincere gratitude to his exact and detailed reporting.
His photos for SDTrans192 Rev. 3.0 is the best that I have ever looked at.
p1050386.jpg


2. SDTrans192 Rev. 2.1 controlled with Hifiduino by a Korean user
HiFiDUINO in Korea H i F i D U I N O
073a.jpg


I was very impressed with his intensive efforts on wiring and his relay circuit.
 
Importance of power supply quality for digital audio devices

In my recent experiences on SDTrans, I have really realized the importance of power supply quality for digital audio devices.

The first person that made us know the importance was RayCTech in Norway, who was the second oversea user of SDTrans192 Rev. 2.0 and 2.1.
He intensively tweaked original on-board power line circuits by replacing with his proprietary JFET and film capacitor-based discrete regulators. The improvement of resulting sounds was remarkable. We owed to him significantly on this point.

In the developing stage of SDTrans192 Rev. 3.0, Chiaki re-designed power lines using regulator chips, 4 x ADP151 and 1 x NS LP3879 with noise filters, Murata NFM31PC and caps, Nichicon LG series.
We had thought this approach had been enough.

However, just recently we has found better an additional solution.
The method is adding such caps, Copper Foil and PolyPhenylene Sulfide (PPS) Film Capacitors 0.022 microF 250V, manufactured by a small specialized Japanese company, SunRing, in parallel to original caps.
�‚‰¹Ž¿•”•i(In Japanese)
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Its effectiveness on improving sound quality is marvelous.
Therefore, we included and sent the parts with the kit for DIY users to add the caps by themselves and to feel the change.
 
Recently (May 2011) I brought the SDTrans 192 Rev 3 to the Highend Show at M,O,C, Munich and used it for a part of our demonstrations in F211 - LYRA/Kiso Acoustic. We achieved a very satisfying sound and received many positive comments.

After returning to Tokyo, Bunpei informed me of the improvement to the SDTrans 192 Rev 3 by adding Sunring Phenylene Sulfide (PPS) copper foil film capacitors to the onboard power supply rails. This update has now been completed, and at the same time I installed the latest updated FPGA in Eprom Version 15 and Firmware Version 3.07 (the latter has new functions for repeat playback of one melody, all melodies within a folder, or all melodies of all folders, and it also has an improved fade out and fade in function that prevents noise when moving between files with different sampling).

Today Sunday June 5th I had the pleasure to listen to the combined update of FPGA in Eprom Version 15, Firmware 3.07, and the PPS capacitors

For the listening I used Kathleen Battle "So Many Stars" and Joe Jackson "Brushfire Fairytales" (Recently remastered by Bernie Grundman and made available as a FLAC download). Control listening was done by SONY SCD-DR1 CD/SACD playback system with Grimm CC-1 external master clock. Also I have available a MacBook Pro based system with M2Tech Evo USB interface using Decibel (sbooth) and Audirvana software. My DA converters are Fidelix Caprice and Berkeley Audio Design Alpha DAC. Speakers are Kiso Acoustic HB-1 and JBL 4333 studio monitors. Preamplifier is Lyra Connoisseur 4-2L SE or 3.0, while the power amps are 2 x Accuphase A-20V.

The result of my evaluation is that this is a major step forward with improved presence, scale, dynamics and definition. More than ever before the music is powerful and present, while any focus on the audio system itself is diminished.

I am personally convinced that the SDTRans 192 Rev 3 with the above mentioned updates provides the very best sound quality for music file playback obtainable today.