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#1 |
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diyAudio Member
Join Date: Apr 2007
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#2 |
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diyAudio Moderator
Join Date: Oct 2007
Location: Santa Cruz, California
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not standard I2S as the data is valid on the 1st rising clock after LRCLK. Analog Devices calls this "left justified"
Not sure what Japanese standard is. Do you know what's coming out of your source? Can you get at the configuration registers? |
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#3 | |
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diyAudio Member
Join Date: Apr 2007
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Quote:
Hello I did email you a file by your web site. Thank Bye Gaetan |
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#4 |
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diyAudio Moderator
Join Date: Oct 2007
Location: Santa Cruz, California
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HI Gaetan.
Looking for the datasheets for the parts on the schematic you sent me I see you have already searched for the audio processor and DAC datasheets. http://www.electronicspoint.com/need...9-t115636.html As usual with the consumer equipment, the datasheets aren't available. You'll need to get a scope on the DATA line, triggered off the LRCLK line. Measure the bit width (that'll give you the bit clock rate) and see on which edge of bitclock the data is clocked. Then you'll know if you can bolt your DAC onto the Toshiba. Unless someone out there has already reverse engineered your model. |
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#5 |
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diyAudio Member
Join Date: Oct 2001
Location: .
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32Fs packed mode. It is both left and right justified and as such either will work.
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#6 | |
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diyAudio Member
Join Date: Apr 2007
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Quote:
Hello 32Fs packed mode, which receiver Ic can do this standard ? Thank you Gaetan |
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#7 |
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diyAudio Member
Join Date: Oct 2001
Location: .
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TC9245
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