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Old 6th December 2008, 10:03 AM   #21
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Personally, I think that there won't be a jitter improvement if you don't give the SRC4192 its own separate clock. If you feel like giving it a shot, though, do some A/B/X testing and let us know if there's a difference.

The DIR9001 datasheet, figure 3, shows best jitter performance at 512fs. But then again, take a look at how THD tracks fs in the PCM1794A datasheet.
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Old 6th December 2008, 10:32 AM   #22
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Thanks for pointing that out mako. I see with 512fs the DIR9001 has <30ps of jitter, pretty good. The PCM1794A has a THD+N = 0.0015% @ 192kHz but ony 0.0008% at 96kHz.

I was just giving an example above really. I see it would be best to leave my source at 48kHz and resample with the SRC to 96kHz to get the best performace. That explains why the ezDAC only does 96kHz.

I think I could manage to to squeeze this XO on the board....

http://search.digikey.com/scripts/Dk...=631-1120-1-ND

Is +/-50ppm too much?

With the clock of the DIR9001 not being used, is there anything I should do to the clock output, or just leave it floating? Does it matter what frequency it is set at since it isn't being used?
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Old 6th December 2008, 10:40 AM   #23
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Hi,

I am late....was shopping :-)

Sorry, I forgot the SRC can not handle SPDIF....so you need a Crystal Receiver or DIR9001. I would not do the DIR9001 recover the clock....because the SRC has very powerful algorithm to do that better as the DIR9001. I would use the SRC to recover by himself.

The DIR9001 will only work as Receiver (like the PCM2702 or 2707 for USB)....all the work will be done by SRC and PCM 1794.

The 96Khz Solution is absolutely okay.....maybe you can add a switch (96/192) :-) Dont think about the jitter of DIR9001....the SRC will get it right.
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Old 6th December 2008, 01:14 PM   #24
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In the ezDAC schematic there are 100R resistors in series with the data lines between the CS8416 and the SCR4192 and also a 47k from the SDOUT pin to ground. Are these needed with the DIR9001?

I think that's the last thing I need to know to get this thing off my PC and into the real world. I have to order some parts and buy a new laser printer as well.

I would like to thank Evan for his ezDAC schematic, it has really helped me out.
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Old 6th December 2008, 01:21 PM   #25
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Maybe you ask this in his EZDac Forum? He also is at the Headwiz Forum!
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Old 7th December 2008, 01:16 AM   #26
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You should choose a clock with low jitter. That's a separate spec from the accuracy (the +/-ppm). There are some part suggestions in other threads.

The 100R resistors are for source termination; they're a bit overkill for these short distances IMHO. Without looking at the CS8416 datasheet, I'm not sure what the 47k is for.
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Old 7th December 2008, 11:36 AM   #27
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I believe this XO has ~3ps rms jitter, comparable to the Tent Labs XO. Jitter specs are on page 4.

http://www.foxonline.com/pdfs/FXO_HC73.pdf

Here is a pic of the PCB layout, it is 1" x 2.1".....

Click the image to open in full size.
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Old 7th December 2008, 05:33 PM   #28
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Nice Work.

The IV Stage with THS will probably not fit on the board but you said that it will be an external PCB.....but there is space for a PCM2706/2707 as USB Receiver :-)

alan
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Old 7th December 2008, 05:48 PM   #29
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Every trace and component was placed manually, no nets or auto-routing.

The I/V board will be the same size and stack on top. When I'm done with this project I will make another with the PCM2707 in place of the DIR9001.
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Old 8th December 2008, 12:58 PM   #30
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1" x 2", nice.

About that clock, notice that they integrate jitter from 12kHz to 20MHz. For D/A conversion purposes we want to consider jitter from 10Hz and up. Looking at the phase noise plot, this clock is not that great. People have posted clock suggestions in other threads, but finding them eludes me at the moment...
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