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26th May 2008, 11:06 PM
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#1 |
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diyAudio Member
Join Date: May 2008
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Ad1865 question
Hi there.glad i am a member of this great forum.
I have a question about the above dac.I keep seeing circuits that place an inverter between the one of the two latches and the fsync.This is for separating the left and right stream via the fsync as i do understand.I just can't understand why they place a selector to separate the data to the DR and DL via the fsync. The dac latches the last 18 bits of data,so i think this is unnessesary? Or i am missing somthing important?? I would appreciate any help Thank you |
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28th May 2008, 02:41 AM
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#2 |
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diyAudio Member
Join Date: Nov 2007
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Look at my schematic
FS:AD1865N-K NON OVER SAMPLING DAC 2.1x PROTOTYPE
Mail me if you need more information. Thanks Rubydac |
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