I2s Oversample Yes O No??

GIPIONE · 17th June 2007, 06:49 AM

I am working wltih a new CDPRO 2 where is possible to have both digital signal: I2S and AES/EBU ( o is same SPDIF)
Now I have listen a DAC where the signal of I2S is over-clock by 4 and 8 time, by switch internal is possible setting .
Speaking with the direct constructor he say that the better and complete sound is with a few oversampling max 4/8 time!
Now my question is:
- is possible oversampling I2S ( the reality say yes)
- where and when it is possible when we use the classic TDA1541A?

thank for the answer.

giampietro

Ardee · 17th June 2007, 07:48 AM

I'm not clear what you are trying to do, but perhaps this will help.

Oversampling is carried out by the interpolation filter. The amount of oversampling is usually limited by the maximum clock rate of the D/A chip, and most filter chips are also limited to 4x at higher input sample rates. I2S is just one method of connecting the SPDIF receiver output to the filter, and the filter output to the D/A chip. If your converter has an I2S input, it is simply bypassing the SPDIF receiver.

Some people do say that 4x is the optimum level of oversampling, but I do not know why.

17th June 2007, 06:49 AM	#1
GIPIONE diyAudio Member Join Date: Apr 2005 Location: TREVISO	I2s Oversample Yes O No?? I am working wltih a new CDPRO 2 where is possible to have both digital signal: I2S and AES/EBU ( o is same SPDIF) Now I have listen a DAC where the signal of I2S is over-clock by 4 and 8 time, by switch internal is possible setting . Speaking with the direct constructor he say that the better and complete sound is with a few oversampling max 4/8 time! Now my question is: - is possible oversampling I2S ( the reality say yes) - where and when it is possible when we use the classic TDA1541A? thank for the answer. giampietro

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17th June 2007, 07:48 AM	#2
Ardee diyAudio Member Join Date: Nov 2005	I'm not clear what you are trying to do, but perhaps this will help. Oversampling is carried out by the interpolation filter. The amount of oversampling is usually limited by the maximum clock rate of the D/A chip, and most filter chips are also limited to 4x at higher input sample rates. I2S is just one method of connecting the SPDIF receiver output to the filter, and the filter output to the D/A chip. If your converter has an I2S input, it is simply bypassing the SPDIF receiver. Some people do say that 4x is the optimum level of oversampling, but I do not know why.