Building the ultimate NOS DAC using TDA1541A

best I2s and Dem mod

This is probably a bit out of place but I have read all 630 posts in this thread and am overwhelmed by the development over many years of the TDA 1541A.

I am a keen DIYer but by no means an expert. My own TDA1541A DAC is inside a Marants CD 63 player and I take the I2S directly from the SAA7345 and feed the TDA1541A in NOS mode. My I/V is via OPA 660 (the well known T.Loesch circuit) and I'm very hasppy with the sound. However, In this thread I read the benefits if I2S attenuation and improving DEM oscillator over the Data Sheet 470pf capacitor on pins 16 and 17 (which I have at the moment). I do not want to go down the road of reducing the DEM oscialltor to 50Hz as per recent posts....though I might expriment as I have several TDA 1541A chips.

My question is simply what is the best easy to implement I2S attenuator circuit, and best DEM oscillatror mod, bearing in mind I have I2S supply from SAA7345 and 16.9344Mhz clock (upgaded). I will make a new PCB so I can implement any circuit, I just wanted to know from people way cleverer than me, what circuits are recommended as I see many itterations in this thread over the years. I am a firm believer of simplicity over complex, so look for the best simple solutions.
 
...best DEM oscillatror mod, bearing in mind I have I2S supply from SAA7345 and 16.9344Mhz clock (upgaded). I will make a new PCB so I can implement any circuit, I just wanted to know from people way cleverer than me, what circuits are recommended as I see many itterations in this thread over the years. I am a firm believer of simplicity over complex, so look for the best simple solutions.


Best time proven and simplest mod for DEM would be two 6k8 resistors, one each from pin 16 and 17 to -15V for DEM and keep the 470pF cap.

With 3.3V logic already (and not 5V) that is probably enough.

RE: attenuation, one current manufacturer (PR) of well regarded 1541A DACs suggests that I2S attenuation is a step backward from 3.3V.

RE: Johns low fDEM, one current manufacturer who is equally well regarded, and in addition has had unanimous commercial success with 1541A (TL), says its simply the wrong approach. DIYHiFi.org • View topic - TDA1541: simult mode; D9001: 24b Left Just, 96KHz; t matters

Like all, read between the lines and you will find your own way.
 
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Attenuators, and 50Hz DEM

Hi john jones,
My question is simply what is the best easy to implement I2S attenuator circuit, and best DEM oscillatror mod, bearing in mind I have I2S supply from SAA7345 and 16.9344Mhz clock (upgaded). I will make a new PCB so I can implement any circuit, I just wanted to know from people way cleverer than me, what circuits are recommended as I see many itterations in this thread over the years. I am a firm believer of simplicity over complex, so look for the best simple solutions.

I've attached an image with the attenuators im using with the corresponding waveforms below them.

Since your running in I2S mode - try using the diode based atten for BCK and the resistive based atten for DATA and WS.

If running in simultaneous mode (which you should because its much better) - Use Diode atten for LE and the resistive atten for DATA L, DATA R, and BCK.

I do not want to go down the road of reducing the DEM oscialltor to 50Hz as per recent posts....though I might expriment as I have several TDA 1541A chips.

I've been running my DEM at 50Hz for the past month or so and am very happy with the mod. I've tested this method by playing -60dB recordings and they played just fine. This mod has helped to identify other weaknesses in my system which have since been corrected. The resulting perceived sound quality has improved by quite some margin - almost as much as going from I2S mode to simultaneous mode. Total cost of this mod is under $10AUD - why not just give it a shot? If you dont like it its no big loss.

I also attached a pic of a waveform coming out of AOL/AOR comparing with and without attenuation.
 

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Hi Ryanj,

Yes i may well experiment wit a 50hz DEM oscillator. However, when you quote: "If running in simultaneous mode (which you should because its much better)" remember I have direct I2S output from SAA7372, and as far as I can read, I2S is difficult to convert to simultaneous format and introduces its own issues. I wonder if it is really worthwhile.

Regards,
John
 
Hi Hanze Khronye,

Best time proven and simplest mod for DEM would be two 6k8 resistors, one each from pin 16 and 17 to -15V for DEM and keep the 470pF cap.

This reduces deterministic jitter on the DEM clock. It won't fix the many problems introduced by a DEM circuit operating at radio frequencies.

There is a 200 ... 300 KHz radio wave being generated right on the substrate where it can do most harm.


With 3.3V logic already (and not 5V) that is probably enough.

RE: attenuation, one current manufacturer (PR) of well regarded 1541A DACs suggests that I2S attenuation is a step backward from 3.3V.

Do you agree that when a I2S attenuator does not cause data corruption it won't have any effect on the data?

The only negative effect an I2S attenuator can have is on the signal that is used to determine the exact moment of output latching:

I2S -> BCK
Simultaneous -> LE

So if we use the wrong type of attenuator circuit here we can slow down transients causing trigger uncertainty and related jitter. In this case the successful manufacturer of TDA1541A-based DACs has point.

What's so bad about some switching noise? it causes on-chip ground-bounce that in turn increases on-chip jitter when this ground-bounce occurs during the exact moment of output latching. It also bleeds to the TDA1541A outputs where it causes switching noise that masks low level detail.


With I2S attenuators we try to limit the amount of external switching noise being dumped on the chip substrate where it will cause more problems. We cannot prevent the internal circuits from re-generating the input signals that in turn will cause on-chip noise no matter what.


When we follow the flock and use I2S we will have to use fast transients on BCK (to minimise trigger uncertainty). There are 128 transients within a sample (64 bit frame) so we get highest possible noise being dumped on the chip substrate and we can't do anything about it. Attenuating DATA and WS (2 transients / frame) won't help much now.

On the exact moment of latching data is still being clocked in so we have ground-bounce during the exact moment of latching.



If we are curious, leave the flock and go for simultaneous interface we get following:

We have to use fast transients on LE. LE only produces two transients within a 64 bit frame so this won't inject much noise at all.
amplitude can be reduced and transients of BCK and data can be slowed down to further lower the injected noise.

Because we now have a simultaneous interface we can clock in L and R data simultaneously. This requires interface activity during 16 bits within a frame. After that, the interface can be shut down for the remaining 48 bits. This will not only reduce injected noise by 75% but will also reduce on-chip (re-generated) noise by 75%.

Now we can generate the LE signal when ground-bounce (of clocking in 16 bit stereo data) has reached zero, for example 16 bits after clocking in the data. This ensures lowest obtainable on-chip jitter with the TDA1541A.

I already posted an oscillogram illustrating the effectiveness of such approach. We can see the switching noise during the clocking in of 16 bits and the 48 bit silence when the interface is shut down.


So what interface is used on almost all (modern) D/A converter chips, I2S of course.
 
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Hi Ryanj,

Yes i may well experiment wit a 50hz DEM oscillator. However, when you quote: "If running in simultaneous mode (which you should because its much better)" remember I have direct I2S output from SAA7372, and as far as I can read, I2S is difficult to convert to simultaneous format and introduces its own issues. I wonder if it is really worthwhile.

Regards,
John

Hi John,

Using simultaneous mode into the 1541 will likely give you some of the best gains in sound quality you can get from a diy point of view. I2S in comparison gives a smeared, and confusing stereophonic image. I tried listening to I2S about 6 months ago after listening with Simultaneous mode continuously for a few years and I was amazed by just how much worse it really is. So yes, its worth the effort in my opinion. You're milage man vary, a chain is only as strong as the weakest link. Once you upgrade one part of your system it usually exposes other areas of weakness.

Good luck.

Ryan
 
For all you know there could be an issue with your I2S set up Ryan

Cheers

Have you tried both input formats?

EC designs most recent post is absolutely spot on. His technical analysis corresponds exactly with my listening experiences. If you can't hear the difference between the two formats then im afraid you may have other areas in your system that needs attention. Just my 2 cents...
 
Hi Hanze Khronye,

Do you agree that when a I2S attenuator does not cause data corruption it won't have any effect on the data?

The only negative effect an I2S attenuator can have is on the signal that is used to determine the exact moment of output latching:

I2S -> BCK
Simultaneous -> LE

So if we use the wrong type of attenuator circuit here we can slow down transients causing trigger uncertainty and related jitter. In this case the successful manufacturer of TDA1541A-based DACs has point.


Hi John,

With the ever changing nature of these things I'm hesistant.

However, I could try the I2S attenuation.

Should I follow Ryanj's circuit and direction from #6305 pg631?.. diode circuit for LE and resistor circuit for BCK, DATA L, DATA R. Generic metal film resistors and 270R, or 1K series for the resistor attenuators?

Thanks.
 
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Altough I haven´t implemented it for the TDA1541, I have no doubt that the simultaneous data format is better than I2S, if you use the "silence" :)

There´s a note about this (generally) on the PMD100 datasheet:
“Silent Conversion” minimizes conversion jitter and ground bounce by allowing time for the DAC substrate noise to settle out prior to conversion.

Thanks,
Alex
 
I2S to SIMULTANEOUS CONVERTER

I attached a schematic diagram of an I2S to Simultaneous converter for the TDA1541A.

The circuit performs following functions:

- Identify and invert MSB within the serial data stream.
- Delay the left channel data in order to align it with the R channel data.
- Create a 16 bit window for clock and data output signals.

Timing diagram is added at the bottom.

The circuit can be built with logic building blocks like 74HC, 74 AHC, 74LV, 74LVC.

If U13 is a problem one can combine two 74HC86 XOR gates instead. One output goes to one input of the other XOR gate, we now have an XOR gate with 3 inputs and one output. The 74LVC1G386 is available in SOT32-6 housing:

http://www.ti.com/lit/ds/symlink/sn74lvc1g386.pdf



Depending on logic building block properties the circuit can work on voltages between 2V4 and 5V. I recommend to use 2V4 ... 3V3 supply voltage.


Connections:

I2S,

DI = D
WSI = WS
BCKI = BCK

Simultaneous,

OB/TWC (pin 27) connects to -5V to put the TDA1541A in simultaneous mode.

DOL connects to pin 3
DOR connects to pin 4
BCKO connects to pin 2
LE connects to pin 1


LE determines the exact moment of output latching, output latching occurs at the 0 -> 1 transition (TDA1541A set to simultaneous mode).
BCK clocks in the data on the 1 -> 0 transition (TDA1541A set to simultaneous mode).
 

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I decided to make the DEM mod in my Marantz CD94, i.e. change the oscillator capacitor to 1uF WIMA MKS-4, and replace the filter capacitors to 100uF/25V Nichicon Muse FG. Also added 2x 15k resistor from pin 16 and 17 to pin 15 (-13.5V).
During the first listening there was a disturbing static in the right channel. It went away after 10 minutes or so. What could be the reason?
BTW the sound seems to have cleaned up, but I need more listening to be more definitive.
I2S attenuator is not yet installed.
 
Hi,

Do these heat sinks somehow affect the sound? Or do they only affect the thermal regime?
It is difficult to do before/after listening tests, so I do not want to state something that might not be true. As for the thermal effect, the top of the chip was hot, which is not good, I think. Now it is just warm, and I have peace of mind (which has positive effect on sound, BTW ;)).