Hi,-ecdesigns-.
Whence you have taken these numerals? From datasheet, from any article or it your own opening?
The DAC can not cause jitter because his output signal is analog. For analog signal exists the concept of the nonlinear distortion, but phase noise - a feature of the digital signal.
The aperture uncertainty by DAC brings towards nonlinear distortion, rather then towards phase noise.
Want good luck.
I think he meant the jitter contribution of the digital circuitry inside the chip before the D/A conversion takes place.
I would be also interested in jitter measuring techniques in general. And questions like: does a digital domain jitter convert to analog domain noise only, or also to something else, like distortion? Does the jitter spectrum directly translate to noise spectrum? How much is too much? Should we care about jitter, if it leads e.g. to -120 dB noise?
I would be also interested in jitter measuring techniques in general. And questions like: does a digital domain jitter convert to analog domain noise only, or also to something else, like distortion? Does the jitter spectrum directly translate to noise spectrum? How much is too much? Should we care about jitter, if it leads e.g. to -120 dB noise?
Hi, oshifis.
That distortion, which contributes microcircuit DAC itself, are taken into account in such parameter, as THD. Where in producer datasheet is spoken about jitter? Why produce extra essence?
This depends on jitter type. If jitter does not depend on signal, he brings about noise of the analog signal. If jitter of digital signal depends on signal, he brings about nonlinear distortion of the analog signal.
I think, for home purposes this is enough.
i2s atenuation for SB
Hi Studiostevus,
I follow the Slimdevices as you advise me for I2S output with SqueezeBox recevier
...
Can you tell me please which value do you useS between th SB's Xilink I2S chip and TDA 1541 for WS & Data ? In the SB, do you take signal after the xilink or after the resistors in the right of it ?
Which cap value betwen DEMs pins ?
@ John,
Thank you for sharing your knowledge, I don't understand all but i learn a lot and have a lot of pleasure to follow the progress...
I read this thread 3 times
, not easy to understand all, but is it possible to build the mk14 with a double sided veroboard or is it better to give up because of noise issue, etc ?
I can understand that I/V with TDA1541 is difficult. Did you have better final sound with TDA1543 or your last I/V stages Mk10 to MK14 are better even with their unsolved problems ?
Is there another way that tubes (like Gomez shematic used Thorsten or Studio Stevus...) because I kill more CD players than i suceed them to work in DIY ...(last an aiwa with pcm56...self electronic discharge) & i don't want to kill the diyer 
with his skillness ! So Jfet or mosefet are ok for me (2sk30, bf630, etc).
cheers
Hi Studiostevus,
I follow the Slimdevices as you advise me for I2S output with SqueezeBox recevier
...Can you tell me please which value do you useS between th SB's Xilink I2S chip and TDA 1541 for WS & Data ? In the SB, do you take signal after the xilink or after the resistors in the right of it ?
Which cap value betwen DEMs pins ?
@ John,
Thank you for sharing your knowledge, I don't understand all but i learn a lot and have a lot of pleasure to follow the progress...
I read this thread 3 times
, not easy to understand all, but is it possible to build the mk14 with a double sided veroboard or is it better to give up because of noise issue, etc ?I can understand that I/V with TDA1541 is difficult. Did you have better final sound with TDA1543 or your last I/V stages Mk10 to MK14 are better even with their unsolved problems ?
Is there another way that tubes (like Gomez shematic used Thorsten or Studio Stevus...) because I kill more CD players than i suceed them to work in DIY ...(last an aiwa with pcm56
...self electronic discharge) & i don't want to kill the diyer with his skillness ! So Jfet or mosefet are ok for me (2sk30, bf630, etc).cheers
More output from I/V stage
Hi
I am having a little less output from the 2SK216 I/V converter than I need (about 10 dB).
I was wondering if the solution could be to increase the value of the I/V resistor and supply with a higher voltage as long as this voltage supply is returned (as reference) to +5V instead of ground?
Maybe a bufferstage is needed because of the higher Z-out (6n6P chatode follower?)
Koldby
Hi
I am having a little less output from the 2SK216 I/V converter than I need (about 10 dB).
I was wondering if the solution could be to increase the value of the I/V resistor and supply with a higher voltage as long as this voltage supply is returned (as reference) to +5V instead of ground?
Maybe a bufferstage is needed because of the higher Z-out (6n6P chatode follower?)
Koldby
Hi
This actually works.
I chaged the I/V resistors to 2K and connected them to + of a (capacitorbypassed) 12V SLA battery with the - going to + 5V .
You have to readjust the trimmers to get 0 V on the output of the TDA1541a.
Now I have enough to play even the most conservatively recorded peices of music at satisfactory levels.
By the way, I was trimming the gate trimmers of the 2sk216 while watching a -60 dB signal on a spectrum analyzer and the best performance is not achived with the outputs at 0V! So my recomandation would be to adjust these trimmers for minimum THD @ - 60 dB or thereabout instead of 0V. There is no difference @ 0 dB as far as I could see, but the again the dynamic range of my measuring setup is only about 105 dB. Of course I can see further down when I playback - 60 dB by increasing the sensitivity, but the a 0 dB signal will badly overload the whole thing.
Koldby
This actually works.
I chaged the I/V resistors to 2K and connected them to + of a (capacitorbypassed) 12V SLA battery with the - going to + 5V .
You have to readjust the trimmers to get 0 V on the output of the TDA1541a.
Now I have enough to play even the most conservatively recorded peices of music at satisfactory levels.
By the way, I was trimming the gate trimmers of the 2sk216 while watching a -60 dB signal on a spectrum analyzer and the best performance is not achived with the outputs at 0V! So my recomandation would be to adjust these trimmers for minimum THD @ - 60 dB or thereabout instead of 0V. There is no difference @ 0 dB as far as I could see, but the again the dynamic range of my measuring setup is only about 105 dB. Of course I can see further down when I playback - 60 dB by increasing the sensitivity, but the a 0 dB signal will badly overload the whole thing.
Koldby
would you please give some details how to do It - there are many with pcm63 dac and shigaclone
which 16.9344 MHz module are you using
How this concept could be pushed further by increasing the SLA voltage to lets say 36V the I/V resistor to 4.7K and obtain signal to drive an unity gain circlotron amplifer for lets say 20w on 8ohm
problem, the gate capacitance of the mosfets is about 900pf
Hi Studiostevus,
I follow the Slimdevices as you advise me for I2S output with SqueezeBox recevier
Can you tell me please which value do you useS between th SB's Xilink I2S chip and TDA 1541 for WS & Data ? In the SB, do you take signal after the xilink or after the resistors in the right of it ?
Which cap value betwen DEMs pins ?
Hi,
Sorry for the late reply. The SB outputs 3.3V signals, so the resistors need to be adjusted to that. I am sorry, but I forgot which eventually worked, the TDA needs 1.8V minimum to trigger.
My DEM setup is not great (I still hear some digital noise in low volume passages), so would be looking forward to hear some ideas from others around this. I was quite happy with 176khz DEM frequency, but as mentioned, I have not set it up properly now....
You would probably need a driver (2sk314-15-16) for the output lateral, but otherwise a good idea IMHO
And maybe even better if you use two tda1541a in phase/antiphase so the circlotron is driven symetrically.
Koldby
yes full symmetric, this is an idea of ecdesign
and even better avoiding the coupling caps, the DC voltage across the i/V resistor could be the right bias for the laterals 2sk1530, then use an L pad attenuator at the output of the circlotron prior the speaker as a volume control
ecdesign could you help us? give us a design of the circlotron without drivers, only the laterals, the bias and the balancing to null the output DC
and even better avoiding the coupling caps, the DC voltage across the i/V resistor could be the right bias for the laterals 2sk1530, then use an L pad attenuator at the output of the circlotron prior the speaker as a volume control
ecdesign could you help us? give us a design of the circlotron without drivers, only the laterals, the bias and the balancing to null the output DC
Hi Studiostevus,
Thank you for your reply. No problem Studio I have anothers toys (marantz cd45 with tda 1540D, i battle for smoothing the trebles... and with a raindrophui ad1865 which is better with output caps than without... sometimes a good cap or a little lundhal can do big things here whithout lose bass
). I will start when i will have all the datas... the i/v is still problematic if people use no tubes if i understand all than i read...So I read again the advise of John after asking you about DEM with the SqueezeB receiver. (because I must read again many times to understand both because I take the train of that thread lately & without the suitcase of a techician). Ok understand now that we need to go near 1.8 v to deal with the jitter.
About the cap between pin 16 &17, I assume that you use 1 uF to 1.7 uF... i have to try.
Just another question please for the beginner I am. Cn I use the mk8 shematic for the bck TDA 1541 feeding but just with one 74AU1G74 (second one not usefull because of the cap method between pin 16&17) ? I don't understand wich chip is doing the division Fhz of the clock to arrive to 2 Mhz with a Master clock oh 12.8.. Mhz ? no bck output between SB & TDA but the Masterclock for feeding the Xiling (removing cristal in the SB as slimdevice forum showed ?)... Am i good
what happen to John ? Holiday I hope or producing module for selling I hope too (but his web is not up-to-date with differents photograph and text of the DAC module, John had no time for that with is big work with development... this guy work to much... I am doing my french guy here
).Just a two cent about DC blockink caps : John want to design a full project with minimal passive components between i/v and his speakers: it's an purist complex work
but for many of us who need a DAC and not change everything maybe we can deal with these caps... after all the old philips LVh 2000 is a killer... with tda 1540, even with OS... and bad caps, and coupling caps and op5534... Thorsten use of course output caps with tubes and not transformer... and I use, me a 2 cents diyer of sundays, a lundhal with one of my cd player which has the great bass...)¸ÐлУ³¤³öÇ®£¬·¢PHILIPS LHH2000ͼƬ£¨Ð¼ÓLHH2000ºÍD730µÄÌý¸Ð£©¡£ - ¶ú »ú ÂÛ Ì³ - ¶ú»ú¾ãÀÖ²¿ÂÛ̳ ¶ú»ú,¶úÈû,¶ú·Å,¶ú»úÂÛ̳,ÒôÀÖ,ÒôÏì - ¶ú»ú¾ãÀÖ²¿
Why we can sometimes hear more bass with an output cap I Don't know : phase ? cut ? curve in 40 - 150 Htz ? strucure of the bass with trebles like when we deal with a high filter in a speaker ? Maybe the new snake-oil : Krill - Huile Oemine for massing the body of the cap for liquid sound, nothing of these ?)... but i can hear it so I will not worry to much about that, IMHO.
...err I forgot to divide by 2 *Pi... Just for accurate measuring purpose I used a 7500 pF 0.5% silver mica capacitor, and I measured a DEM frequency of 12.06 kHz. This will give R=1.76 kohm. The average of John's capacitance vs. frequency gives R=1.9 kohm.
DEM frequency
Hi Oshifis,
Do you know please the value for DEM cap for a 176,4 Khz lock ?
You talk about 7,5 nano for 12,06 Khz... Do you lock with it & does it sound ?
Is it good to go below 150 Khz ? Or above 250 Khz ?
I understood 176,4 Khz could be a good Fdem for lock between these 2 values, is it true ?
John said (for his SD card module):
6K8 between pin 15 (-15V) and 16
6K8 between pin 15 (-15V) and 17
Timing cap between pin 16 and 17 (1n5 or lower).
I mistake writting just before your post: 1 uf to 1,7 uF for Fdem... It's nano Farad... not micro Farad.
So I assume 1,5 n is for 80 Khz (4x20Khz minimum advised ... I do not clearly understand which Fdem is used by John) ? So Fdem good between 80 Khy and 250 Khz ?
Is there a table for KHZ below 250 Khz ? Do I need to change R of pin 15 or 6k8 can be a set value ?
Sorry for replaying the "free DEM frequency" posts here but I misanderstood about the setting of it...
Many thanks if you or somebody could help me.
Hi Oshifis,
Do you know please the value for DEM cap for a 176,4 Khz lock ?
You talk about 7,5 nano for 12,06 Khz... Do you lock with it & does it sound ?
Is it good to go below 150 Khz ? Or above 250 Khz ?
I understood 176,4 Khz could be a good Fdem for lock between these 2 values, is it true ?
John said (for his SD card module):
6K8 between pin 15 (-15V) and 16
6K8 between pin 15 (-15V) and 17
Timing cap between pin 16 and 17 (1n5 or lower).
I mistake writting just before your post: 1 uf to 1,7 uF for Fdem... It's nano Farad... not micro Farad.
So I assume 1,5 n is for 80 Khz (4x20Khz minimum advised ... I do not clearly understand which Fdem is used by John) ? So Fdem good between 80 Khy and 250 Khz ?
Is there a table for KHZ below 250 Khz ? Do I need to change R of pin 15 or 6k8 can be a set value ?
Sorry for replaying the "free DEM frequency" posts here but I misanderstood about the setting of it...
Many thanks if you or somebody could help me.
I used a 1000 pf (1 n) cap, 6K8 resistors, and -15V to pins 16 and 17 to achieve a lock at ~88kHz. I have a 100 pf air capacitor in parallel with the 1000 pf cap, but its barely engaged.
Does anyone have the calculation(s) for the oscillator capacitor values at varying frequencies?
Same for the MSB capacitor at varying frequencies?
Sorry if I missed that somewhere.....
Does anyone have the calculation(s) for the oscillator capacitor values at varying frequencies?
Same for the MSB capacitor at varying frequencies?
Sorry if I missed that somewhere.....
The Graal of the Good DEM
Here Brubeck's experience. Do we understand as John seems suggest that 1,5 nF is for somewhat 80 khz and 1 nF (not uF) for 60 Khz should be good results (under the 100 khz of Brubeck)?
But StudioStevus (his source is a Squeezebox receiver outputing 3.3 V I2S like I try to plan...) is almost happy with 175.4 Khz
.
In my personal experience (with 1uF cap) the optimum for my ears is around 60khz DEM. If i go higher (>100khz) the sound seems more refined but tends to irritate, if i go lower (<25khz) it becomes a bit lifeless. I find it hard to correlate the results. There's a lot going on in the chip
Here Brubeck's experience. Do we understand as John seems suggest that 1,5 nF is for somewhat 80 khz and 1 nF (not uF) for 60 Khz should be good results (under the 100 khz of Brubeck)?
But StudioStevus (his source is a Squeezebox receiver outputing 3.3 V I2S like I try to plan...) is almost happy with 175.4 Khz
.Thank you for the input Crobbins,
If I'm right I think it's important to have some inputs of readers here to understand the best values needed for Dem and into these values if a subjective value must be seted for each particular system (speakers, I2S source or I2S attenuation, MSB caps value...).
Because If I understand what I read before there is a match to do for the DEM Fhz Cap for SQ between a SM cap à la John and a bigger Silver cap à la... I forget the name here). A trigger cap seems to give bad SQ (right/wrong?) even with // true cap. It should be very expensive to buy a lot of silver mica or good SM cap. Not to good for the TDA1541 too!
What do you use for MSB decoupling ? 1 Uf, 2 uf everywhere ? Ceramic? or John 's SM caps ?
cheers
If I'm right I think it's important to have some inputs of readers here to understand the best values needed for Dem and into these values if a subjective value must be seted for each particular system (speakers, I2S source or I2S attenuation, MSB caps value...).
Because If I understand what I read before there is a match to do for the DEM Fhz Cap for SQ between a SM cap à la John and a bigger Silver cap à la... I forget the name here). A trigger cap seems to give bad SQ (right/wrong?) even with // true cap. It should be very expensive to buy a lot of silver mica or good SM cap. Not to good for the TDA1541 too!
What do you use for MSB decoupling ? 1 Uf, 2 uf everywhere ? Ceramic? or John 's SM caps ?
cheers
The resistance of TDA1541 DEM RC oscillator should be around 1K85, so you can calculate the capacitor value for any frequency using the typical RC oscillator formula: c = 1 / (2 * Pi * 1850 * fDEM) (capacitance in Farad). Around 485 pF for 176kHz. BTW, I believe the resultant capacitor value has to be trimmed to lock (thanks James).