Building the ultimate NOS DAC using TDA1541A

@batteryman , Balanced for sure. The D3 boards allow you to parallel another 1541A for each balanced channel so just trying to plan ahead.
was the 75r IV on the outputs of the 1541? Or on the outputs of the transformers?

Transformers are the next step for me for sure. I just didn't want to spend $375 just yet for the Sowter's. I wanted to get something playing first before I took that step. I figured since I already have the SEN boards I'll try them plus I'm a sucker for the jfet sound.
 
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First of all the outputs are in parallel, so you only need one contra current and one Rload . Kirchhoff first law. No need for two, making things difficult to trim. if the 7815 is followed by some real nice RC filtering it seems ok to try out. I would also pre-load the 7815 directly at the output with say 100mA and not have it output only a few mA. I see no further issues, but I might oversee it…
@dddac thanks for your input! I was learning from your designs when studying dac's. You have a lot of experience in paralleling dac's, have you paralelled 1541 or only 1543? My first idea was to use only one biasing circuit but Zoran and fabrice63 sort of convinced me to close the output current loops at each dac individually. Very good idea of pre-loading LM7815, thanks! RC (say CRC) filetring at the output of LM7815 would be partially in the output signal loop. Is it better to have an CRC there than just bare LM7815?
 
An updated PCB board project. The main change is a different routing of DGND on Layer 2. It is now such that the input signals first encounter the DGND pin 14 of each DAC and only then DGND connects to pin 5 AGND. This is achieved by a cut between the DGND pour below the input attenuators and the patch that connects pins 14 and 5:

2xTDA1541A_v5_Top+Layer2.png


Red tracks are Top layer, brown is DGND on Layer 2.

Layer 3 (cyan tracks) with power connections and GND of -15V (the pour on the bottom):

2xTDA1541A_v5_Layer3.png



Bottom (Layer4) with AGND pour (blue), arranged in a sort of a star connection, so that DEM caps first see the pin 5. The GND of +5V, -5V regulators is connected here in the upper part:

2xTDA1541A_v5_Bottom.png


The outputs and the connections between pins 16 will be made by P2P wiring directly at the bottom of the PCB.
 

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