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Old 5th July 2006, 08:25 AM   #491
tubee is offline tubee  Netherlands
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Default I2S interface

When there is I2S available on the transport, and i can get it from my CDP, i suggest to take this, and skip the CS8412 in the signal line to dac. To avoid again another multiplex/demultiplex.
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Old 5th July 2006, 09:01 AM   #492
MGH is offline MGH  United States
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Hi Nick,

If you read the earlier posts, the Octal DAC is not ready for sale yet. EC has not given an estimated date for completion or approximate cost, although you could probably assume it will be more expensive of the DIY DACs out there, given the parts and quality of the chassis involved. We're all anxiously waiting.

EC, would you be able to help Nick?
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Old 5th July 2006, 10:59 AM   #493
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Hi,
I think rfbrw has a good point here.
The I2S generator you specify will work, but maybe isn't the best choice.
Although you have the SPDIF converter close to the source (so less chance of errors being introduced), you're still multiplexing three signals into a single, selfclocking one, and then changing back. That will surely introduce issues?.

Wouldn't it be simpler to convert the sony format into I2S? Or better still, find a Philips based CDP for a transport?

Anyway, reclocking. I struggle to understand it at times. Is there an assumption that MCLK is greater than BCLK? Is BCLK completely divisible by MCLK. I can't get my head around what happens if the CLK that is clocking the flip flop occurs at an awkward time (like when the data or ws line is in transition to the next bit).
I'm sure this would never happen in reality, but it is possible. Am I worrying too much?

Also, I have all the bits now for the I2S RS422 driver and receiver. I've started building the driver board to go in the CD player. Need to order some DACs soon (won't be doing DI-DAC just yet, going to have a play first, but doing the differential I2S for sure).

Cheers,
Phil


Quote:
quote:
Originally posted by -ecdesigns-

So let's forget about SPDIF and move on to I2S,


A sentence or two later.
quote:

Now suppose the the audio interface chip (CS8412) was placed in, or very close to the transport instead of the DAC.


Do you not see the contradiction here?
quote:

It could be directly driven by the SPDIF output signal of the digital processor chip without using long cables or transformers. It would also automatically convert to philips I2S format (jumper settings). Then the icing on the cake, BCK, DATA and WS can be synchronously reclocked by the (low jitter) master clock that has a fixed phase relation to both WS and BCK. D-flipflops can be used for reclocking.

Now we have a universal very low jitter philips I2S interface in the transport. The 3 signals WS, BCK and DATA can be transported


What can you possibly want to connect to, where the above would be an advantage?
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Old 5th July 2006, 11:37 AM   #494
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I would use a Philips CD304mkII (slow servo) or CD960 (fast servo)
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Old 5th July 2006, 11:47 AM   #495
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I'm working on a Philips CD624, it cost me £10 in a second hand shop. I also have a Marantz CD41 which (when you lift the hood) is as good as identical (which is good for spares etc).
The Marantz cost me £11 off of Ebay.
I think they both have CDM4s (the one with the swinging arm?).
The mechanics are much quieter than my later Marantz CD63 (although that's very quiet at the moment ) and they read CD-Rs very happilly.

I hope to get this diff I2S output going, and after the DAC is working, I'll fit a clock with less jitter, and one day upgrade the transport, if needs be.

Cheers,
Phil
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Old 5th July 2006, 04:46 PM   #496
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Hi Nick Mega

Quote:
I will get a cdm pro2 and want to use the i2s output into the dac then use a tube output stage..
CDPRO-2M is a nice transport but be aware that rfbrw found that:
Quote:
the CD Pro2 has an I2S option but BCK is 48Fs.
Here's what ecdesigns explained about D-I technique:

Quote:
Twin Direct Interpolation by parallelling DAC outputs: it uses the WS signal to split up the 64 BCK pulses long sample into two 32 BCK long samples DAC1 receives the standard signals and outputs L and R. DAC2 receives an inverted WS (wordselect) causing a 32 BCK long delay
If I understood well, 48Fs is not high enough. Rfbrw commented about a way to increase it to 64Fs but I think it will be scarry

I hope the big brothers extend the sharing of their knowledge here

M.

PS: CDPRO has AES output also. Maybe it's better than SPDIF.
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Old 5th July 2006, 04:59 PM   #497
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Isn't AES/EBU just a (essentially) a differential variant of SPDIF?
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Old 5th July 2006, 06:22 PM   #498
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Quote:
Originally posted by philpoole
Isn't AES/EBU just a (essentially) a differential variant of SPDIF?
I also think so...AES/EBU is a 'professional' SPDIF, think 110ohm and normally linked with XLR. But that's as far as my knowledge goes

Erik
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Old 5th July 2006, 06:29 PM   #499
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Quote:
Originally posted by maxlorenz
If I understood well, 48Fs is not high enough. Rfbrw commented about a way to increase it to 64Fs but I think it will be scarry


No need to go from 48 to 64. Just use different shift register taps.


Quote:
Originally posted by philpoole
Isn't AES/EBU just a (essentially) a differential variant of SPDIF?

With different channel status flags, a much higher output level and balanced.
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Old 5th July 2006, 07:50 PM   #500
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Default octal D-I DAC interface

Hi all,

Lots of discussions going on about interfaces and formats. I have been very busy with interface measurements and listening sessions, so I will reply to posts later. The following is very important.

Project news,

The clock upgrade and the universal I2S interface produced an improvement that really shocked me, I never expected such an improvement was even possible. The improvement was verified by other people that listened to this setup and could directly compare it with the "old" SPDIF setup. Also note that this interface outputs the PHILIPS FORMAT that is needed for the octal D-I DAC, so no further conversion is necessary. If your transport already outputs the philips format, the CS8412 is not necessary of course.

Here is what I personally can conclude from measurements and listening tests:

Never ever transport SPDIF over a longer cable (>20cm), it will have a very bad effect on sound quality. I am afraid, a similar effect would occur using USB, as this signal also carries both data and synchronization. In fact the PCM2706 datasheet already indicates a SpAct PLL circuit is used to recover a low jitter audio clock from the USB packet data.

The good news however is when the SPDIF / USB cable is kept very short and no transformers are used, things look quite different. So it's of paramount importance to put the SPDIF / USB receiver as close to the source as possible, then transport the generated I2S signal by using the differential interface. When reclocking can be applied as well, I2S performance can be obtained.

I am 100% convinced now transporting I2S using the differential interface, outperforms SPDIF by far.

Using a stable low jitter clock in the transport is a must.

Octal D-I DAC setup:

So this will have quite a impact on the octal D-I DAC setup. Now it will accept I2S with a differential interface exclusively, putting any other audio receiver in the DAC housing is useless when optimal sound quality has to be achieved, as the audio receiver now has to be placed close to the source, not close to or in the DAC.

During testing I used standard 3 meters long unshielded network cable, I also cascaded D-flipflops in the universal I2S interface (there were 3 unused). I also inverted MCK. I will post a new diagram soon, no optical isolation was used, only RS422 drivers and receivers. The DS8922 (4X) was used with 100 Ohm termination as the other chips didn't arrive today.
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