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Old 3rd July 2006, 08:18 AM   #481
a333bt is offline a333bt  Slovenia
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Join Date: Jun 2004
Location: Vodice
Hi Rfbrw,

thank you for reply.

i guess CDPRO2 is not so good as i think.

Can be converted in 64fs to take full advantage of octal D-I DAC?

Or better using SPDIF output?

Sorry my digital knowledge is not so good, but desire to built is strong.


Thank you in advance.

regards, Bostjan
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Old 3rd July 2006, 10:00 AM   #482
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Default Interfaces

Hi maxlorenz,

Thanks for your reply [post#471]

> I used the SPDIF interface, among I2S and USB to make the octal D-I DAC universal. I am going to use a mac with the USB to I2S converter module myself (I already received the PCM2706), this chip can be clocked externally (12MHz) for optimal performance. It uses the 16 bit I2S philips format, so I don't have to swap the timing chain module. Perhaps this is the most elegant way, just imagine many thousands of tracks can be played by the push of a button, with all information including CD cover photo on the screen, without swapping (and scratching) your CD's. When CD's are read using the "paranoia" mode, multiple reads make sure every last bit is recovered as good as possible. The CD images are stored on harddisk (Itunes) using lossless compression (approx. 250Mb/CD). A common 250Gb disc can theoretically hold about 1000 CD's this way! Back-up's can be made using a external USB / firewire disc with a similar capacity.

A number of transports are using the I2S sony format (24 bits, 48BCK / frame) this can be converted to 16 bit 48BCK / frame by using a delay circuit [post#466], thanks a333bt. The timing chain module can be swapped. So if necessary a timing-chain version based upon 48BCK with a integraded conversion circuit can be used instead. The 48BCK timing chain uses 0, 6, 12, 18, 24, 30, 36 and 42BCK delay, instead of multiples of 8BCK delay, SN74HCT164 can be used to provide these tap's. I am also looking at the possibility of using a one chip PLD based timing chain that supports both I2S formats.

> SPDIF sound quality, a remark often heared is that SPDIF degrades sound quality when compared to I2S, but there are lots of different SPDIF setups with different interface chips, cables, with or without transformers, with different loopback filter design, and then there is the critical PCB lay-out. So a realistic comparison is not that easy.
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Old 3rd July 2006, 12:19 PM   #483
a333bt is offline a333bt  Slovenia
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Hi Ecdesign,

yes, i agree with you about SPDIF.
I didnt use pulse transformer and it has non optimised loopback filter...

Do you already know, when will be PCB for D-I DAC available?

regards, Bostjan
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Old 3rd July 2006, 05:02 PM   #484
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Thanks rfbrw and ecdesigns for the info about I2S

Regards
M
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Old 3rd July 2006, 07:05 PM   #485
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Default mini clock upgrade

Hi tubee,

Thanks for your tip [post#463]

> No I didn't have enough space for a KC7 upgrade, I had to use a mini clock upgrade. Here is what I did, I gave a 20MHz crystal module (from an old network card) the EC designs demolition treatment. Inside the metal case was a small circuit board with a 8 pin WF10192 programmable SMD clock oscillator chip. So I designed a small circuit board, took the 16.9341MHz crystal from the sony and put everything together. Then I soldered the PCB very close to the CX2587Q Xtal input pin. I added some photographs. The sound quality has improved indeed, good tip.

WF10192 connections:

pin1: enable (leave open for normal operation), pin2: crystal, pin4: ground, pin5: output
pin7: crystal, pin8: +5V

only pin3 connected to ground: output divide by 2
only pin6 connected to ground: output divide by 8
both pin3 and pin6 connected to ground: output divide by 4
both pin3 and pin6 open: output equals crystal frequency.

> I2S interface, the sony has a plastic cover located exactly opposite to the chip (for service). I am going to put a 9 way sub-D connector and 3 differential RS422 drivers in that cover, so connections can be kept very short. Then I plan to run some tests with the modified timing chain for the sony I2S format.
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Old 4th July 2006, 03:15 PM   #486
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Default Universal I2S interface schematics

Hi all,

Problem1: SPDIF jitters
Problem2: I2S comes in different formats (compatibility)
Problem3: How to transport I2S to a external DAC

Solution: Universal Philips I2S interface (can be added to almost every transport).

Basically SPDIF jitter occurs because both data and clock signals are mixed using Biphase Mark Code and then transported to the DAC by a optical, coax or differential interface cable of a few meters, jitter is added to the integrated clock signal by the varying data content.

So let's forget about SPDIF and move on to I2S,

What signals are present in almost every transport? SPDIF and the master clock (low jitter guido tent or elso kwak clock).

Now suppose the the audio interface chip (CS8412) was placed in, or very close to the transport instead of the DAC. It could be directly driven by the SPDIF output signal of the digital processor chip without using long cables or transformers. It would also automatically convert to philips I2S format (jumper settings). Then the icing on the cake, BCK, DATA and WS can be synchronously reclocked by the (low jitter) master clock that has a fixed phase relation to both WS and BCK. D-flipflops can be used for reclocking.

Now we have a universal very low jitter philips I2S interface in the transport. The 3 signals WS, BCK and DATA can be transported by using 3 differential RS422 interface drivers (1 X AM26LS31). On the receiving side (DAC) we use RS422 interface receivers (1 X AM26LS32), the lines can be terminated at the DAC side (54 Ohm). And why not use a standard cable available for this purpose: (screened) cat5 (4 X twisted pair) network cable. I am sure this will significantly reduce jitter as the transported clock signal is a non-modulated squarewave of a constant frequency. It will also solve I2S compatibility problems.

Oh, yes I already added a rough concept schematic diagram of this universal I2S interface. I am sure lots of improvements can be made, but it's a start.
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Old 4th July 2006, 06:46 PM   #487
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Default Re: Universal I2S interface schematics

Quote:
Originally posted by -ecdesigns-
Hi all,

Problem2: I2S comes in different formats (compatibility)

Wrong. I2S, like I2C, comes in one format only.

The I2S Bus Specification.
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Old 4th July 2006, 07:39 PM   #488
tubee is offline tubee  Netherlands
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Hi EC, thanks for appreciating my tips about the cristal. You where offline a few days, "he's breeding and building on something again" i thought.

Well, how is sound improved?
If you want to feed the clock in a good way, its best to build a TL431 regulater with a BC5** transistor. I did this for a Tent XO, and this little circuit sounds better then the standard PS suggested by Guido (this one has a LM7808, i don't really like those 78** regs.) I searched for a schematic of it but its removed from the web. If you want to try this PS schematic, i will post a copy, have it on paper. Its very small, will fit in.

My family does like the upgrade of the 304 a lot, my wife, and later the housekeeper, turned their back when a CD of Frank Boeien, and Limb Biscuit, was playing. They said its like the instruments are in the room.
And i didn't do a lot on the 304.

We have a lot of the same thoughts: I have an old Philips 14bit CD300, it uses a 4.***Mhz cristal, i want to try an clock upgrade. So 2-3 weeks ago i have scavenged a cristal from an old PC ISA card with 16mHz freq. I grinded the top edges away on 3 sides to have a look in it. It has a chip and a cristal on a small ceramic pcb. I want to exchange the cristal eventually, not easy, it is suspended on two metal springs. My Marantz surround receiver will have a clock upgrade too in future.

Im glad you decided to go I2S, good decision
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Old 4th July 2006, 07:44 PM   #489
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Quote:
Originally posted by -ecdesigns-

So let's forget about SPDIF and move on to I2S,
A sentence or two later.

Quote:

Now suppose the the audio interface chip (CS8412) was placed in, or very close to the transport instead of the DAC.
Do you not see the contradiction here?

Quote:

It could be directly driven by the SPDIF output signal of the digital processor chip without using long cables or transformers. It would also automatically convert to philips I2S format (jumper settings). Then the icing on the cake, BCK, DATA and WS can be synchronously reclocked by the (low jitter) master clock that has a fixed phase relation to both WS and BCK. D-flipflops can be used for reclocking.

Now we have a universal very low jitter philips I2S interface in the transport. The 3 signals WS, BCK and DATA can be transported
What can you possibly want to connect to, where the above would be an advantage?
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Old 5th July 2006, 03:45 AM   #490
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Default Just joined thread. kit using cdmpro2

Hi there
After reading this thread it is mouthwatering to have a setup which uses the tda1541a.. Doeas ec designs sell the boards for the following
I will get a cdm pro2 and want to use the i2s output into the dac then use a tube output stage..
WHat solution do you have to this ecdesigns, do you sell them or at least the pcb's (including the power supply boards)
Thanks
I live in Australia so USDollars will be cool and an address to send money to you if posssible
Thanks
Nick Mega
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