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Old 4th February 2013, 06:24 AM   #4721
SSerg is offline SSerg  Russian Federation
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Quote:
Originally Posted by -ecdesigns- View Post
Zero BCK jitter doesn't solve the jitter problem because the DAC chip adds considerable jitter of its own (cumulative jitter) this could well be in the range of 50 500ps.
Hi,-ecdesigns-.
Whence you have taken these numerals? From datasheet, from any article or it your own opening?
The DAC can not cause jitter because his output signal is analog. For analog signal exists the concept of the nonlinear distortion, but phase noise - a feature of the digital signal.
The aperture uncertainty by DAC brings towards nonlinear distortion, rather then towards phase noise.
Want good luck.
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Old 5th February 2013, 12:55 PM   #4722
oshifis is online now oshifis  Hungary
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I think he meant the jitter contribution of the digital circuitry inside the chip before the D/A conversion takes place.

I would be also interested in jitter measuring techniques in general. And questions like: does a digital domain jitter convert to analog domain noise only, or also to something else, like distortion? Does the jitter spectrum directly translate to noise spectrum? How much is too much? Should we care about jitter, if it leads e.g. to -120 dB noise?
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Old 6th February 2013, 12:07 PM   #4723
SSerg is offline SSerg  Russian Federation
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Hi, oshifis.

Quote:
Originally Posted by oshifis View Post
I think he meant the jitter contribution of the digital circuitry inside the chip before the D/A conversion takes place.
That distortion, which contributes microcircuit DAC itself, are taken into account in such parameter, as THD. Where in producer datasheet is spoken about jitter? Why produce extra essence?
Quote:
Originally Posted by oshifis View Post
And questions like: does a digital domain jitter convert to analog domain noise only, or also to something else, like distortion?
This depends on jitter type. If jitter does not depend on signal, he brings about noise of the analog signal. If jitter of digital signal depends on signal, he brings about nonlinear distortion of the analog signal.
Quote:
Originally Posted by oshifis View Post
Should we care about jitter, if it leads e.g. to -120 dB noise?
I think, for home purposes this is enough.
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Old 10th February 2013, 10:16 PM   #4724
Eldam is online now Eldam  France
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Default i2s atenuation for SB

Quote:
Originally Posted by studiostevus View Post
Eureka! You triggered me into the i2s attenuators... I lowered the attenuation a bit and GO!

Thanks so much!
Hi Studiostevus,

I follow the Slimdevices as you advise me for I2S output with SqueezeBox recevier...
Can you tell me please which value do you useS between th SB's Xilink I2S chip and TDA 1541 for WS & Data ? In the SB, do you take signal after the xilink or after the resistors in the right of it ?

Which cap value betwen DEMs pins ?

@ John,

Thank you for sharing your knowledge, I don't understand all but i learn a lot and have a lot of pleasure to follow the progress...

I read this thread 3 times , not easy to understand all, but is it possible to build the mk14 with a double sided veroboard or is it better to give up because of noise issue, etc ?
I can understand that I/V with TDA1541 is difficult. Did you have better final sound with TDA1543 or your last I/V stages Mk10 to MK14 are better even with their unsolved problems ?

Is there another way that tubes (like Gomez shematic used Thorsten or Studio Stevus...) because I kill more CD players than i suceed them to work in DIY ...(last an aiwa with pcm56...self electronic discharge) & i don't want to kill the diyer with his skillness ! So Jfet or mosefet are ok for me (2sk30, bf630, etc).

cheers
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Old 11th February 2013, 07:28 AM   #4725
koldby is offline koldby  Denmark
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Default More output from I/V stage

Hi

I am having a little less output from the 2SK216 I/V converter than I need (about 10 dB).
I was wondering if the solution could be to increase the value of the I/V resistor and supply with a higher voltage as long as this voltage supply is returned (as reference) to +5V instead of ground?
Maybe a bufferstage is needed because of the higher Z-out (6n6P chatode follower?)

Koldby
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Old 11th February 2013, 12:27 PM   #4726
koldby is offline koldby  Denmark
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Hi

This actually works.
I chaged the I/V resistors to 2K and connected them to + of a (capacitorbypassed) 12V SLA battery with the - going to + 5V .
You have to readjust the trimmers to get 0 V on the output of the TDA1541a.
Now I have enough to play even the most conservatively recorded peices of music at satisfactory levels.

By the way, I was trimming the gate trimmers of the 2sk216 while watching a -60 dB signal on a spectrum analyzer and the best performance is not achived with the outputs at 0V! So my recomandation would be to adjust these trimmers for minimum THD @ - 60 dB or thereabout instead of 0V. There is no difference @ 0 dB as far as I could see, but the again the dynamic range of my measuring setup is only about 105 dB. Of course I can see further down when I playback - 60 dB by increasing the sensitivity, but the a 0 dB signal will badly overload the whole thing.

Koldby
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Old 11th February 2013, 12:37 PM   #4727
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Quote:
Originally Posted by Dr.H View Post
Thanks ecdesigns, you've bee a generous fount of knowledge!

I'm keen to build a couple of your balanced designs as per schematics you've posted earlier. Will report here, juts have to find the time...

I've slaved a PCM63 based to a "Shigaclone" and liked the result-sharper images, lower noise floor.

How would one slave a CS8412-1543 NOS dac to a transport?
would you please give some details how to do It - there are many with pcm63 dac and shigaclone
which 16.9344 MHz module are you using
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Old 22nd February 2013, 01:35 PM   #4728
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Quote:
Originally Posted by koldby View Post
Hi

This actually works.
I chaged the I/V resistors to 2K and connected them to + of a (capacitorbypassed) 12V SLA battery with the - going to + 5V .
You have to readjust the trimmers to get 0 V on the output of the TDA1541a.
Now I have enough to play even the most conservatively recorded peices of music at satisfactory levels.



Koldby
How this concept could be pushed further by increasing the SLA voltage to lets say 36V the I/V resistor to 4.7K and obtain signal to drive an unity gain circlotron amplifer for lets say 20w on 8ohm

problem, the gate capacitance of the mosfets is about 900pf
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Old 22nd February 2013, 02:11 PM   #4729
regal is offline regal  United States
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Quote:
Originally Posted by marconi118 View Post
How this concept could be pushed further by increasing the SLA voltage to lets say 36V the I/V resistor to 4.7K and obtain signal to drive an unity gain circlotron amplifer for lets say 20w on 8ohm

problem, the gate capacitance of the mosfets is about 900pf
and the 4.7k output impedance is fairly high.
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Old 23rd February 2013, 07:38 AM   #4730
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Quote:
Originally Posted by Eldam View Post
Hi Studiostevus,

I follow the Slimdevices as you advise me for I2S output with SqueezeBox recevier...
Can you tell me please which value do you useS between th SB's Xilink I2S chip and TDA 1541 for WS & Data ? In the SB, do you take signal after the xilink or after the resistors in the right of it ?

Which cap value betwen DEMs pins ?
Hi,
Sorry for the late reply. The SB outputs 3.3V signals, so the resistors need to be adjusted to that. I am sorry, but I forgot which eventually worked, the TDA needs 1.8V minimum to trigger.

My DEM setup is not great (I still hear some digital noise in low volume passages), so would be looking forward to hear some ideas from others around this. I was quite happy with 176khz DEM frequency, but as mentioned, I have not set it up properly now....
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