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Old 29th November 2012, 02:30 PM   #4661
SSerg is offline SSerg  Russian Federation
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Hi, studiostevus
Quote:
Originally Posted by studiostevus View Post
The only further benefit i can think of is aligning the rc filter's phase shifts between the different bits (1-16)... Not sure what the benefit of that would be though (can't hurt for sure)
The possible benefit - for instance, win of the space for accommodation capacitor on board. Why this is necessary? First, possible reduce the tracks length. Secondly, possible enlarge the capacity for MSBs to account of the reduction to capacities for LSBs.
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Old 29th November 2012, 02:41 PM   #4662
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Originally Posted by SSerg View Post
Hi, studiostevus

The possible benefit - for instance, win of the space for accommodation capacitor on board. Why this is necessary? First, possible reduce the tracks length. Secondly, possible enlarge the capacity for MSBs to account of the reduction to capacities for LSBs.
Mmmm.... I am using smd 1210 caps with 1uf value ( as suggested earlier by john) as filter caps, mounted directly at the pins under the tda. I think there is little to win there ...

What about correcting phase shift for each of the bits ( at least keeping phase shifts the same over all different bits). Do you see any merits? Not sure what phase shift would do in the digital domain...
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Old 30th November 2012, 01:13 PM   #4663
SSerg is offline SSerg  Russian Federation
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Hi, studiostevus
Quote:
Originally Posted by studiostevus View Post
Mmmm....
I think, your "--" in vain. The vacant place never can be spare if the question is such demanding device, as DAC.
Quote:
Originally Posted by studiostevus View Post
What about correcting phase shift for each of the bits. Do you see any merits?
Align the phase shifts of AC constituting of bit currents? Why?
This is "waste production", and their fate does not worry.
Us interest at given aspect only DC component. Only this component forms the output analog signal. It is important that she differed exactly in 2 times at nearby bits. For this is intended DEM technology.
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Old 13th December 2012, 09:20 AM   #4664
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Originally Posted by JOSI1 View Post
Hello Andrea,

it is right to divide OCXO clock by 4 (2.1168MHz) for DAC chip BCK.
Just a doubt about clock distribution (8.4672 master clock, CD PRO and TDA1541 NOS mode): 8.4672 MHz (inverted/inverted) directly to CD PRO clock, master clock divided by 4 (flip-flop), so 2.1168 MHz, to DAC bck...
data and WS directly from CD PRO I2S to DAC?
or just reclocked by flip-flop?

One more question: replacing CD PRO with QA-550 sd card player is that correct the above configuration?
The QA-550 use an 11.2896 MHz clock, can I assume it outputs 2 words of 32 bit at fs, so bck is 2.8224 MHz (11.2896 divided by 4)?

Thanks
Andrea
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Old 13th December 2012, 10:16 PM   #4665
JOSI1 is offline JOSI1  Germany
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Hello Andrea,

to protect the decoder chip from damage I use a buffer for WS and Data but do no reclocking. Both signals are connected via a voltage divider/serial resistor to the TDA1541 inputs (see post #4612).
I don't know the QA-550 but I think your assumption is correct.
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Old 20th December 2012, 08:35 PM   #4666
oshifis is offline oshifis  Hungary
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Quote:
Originally Posted by SSerg View Post
Hi, studiostevus

The possible benefit - for instance, win of the space for accommodation capacitor on board. Why this is necessary? First, possible reduce the tracks length. Secondly, possible enlarge the capacity for MSBs to account of the reduction to capacities for LSBs.
I was thinking about the bit current filtering external capacitors and what you wrote about reducing the track length. Also useful is your table with the voltages at the pins. Let's add an Rleak external capacitor representing capacitor loss and trace leak. For the MSB of 2 mA we want this Rleak cause less than 1/2 LSB current inaccuracy. If the voltage at the MSB pin 13 and 18 is -7.5V, the Rleak should not be less than 2 x 7.5 x 2^15 / 0.002 ohms, that is 245 Mohm! This suggests strict requirements on the quality of the capacitor and even on the quality of the PCB itself.
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Old 21st December 2012, 02:15 PM   #4667
SSerg is offline SSerg  Russian Federation
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Hi, oshifis,
You are right. Towards quality of the capacitor insulation and of the PSB insulation are presented serious requirements. (You about this did not know earlier?) I will say more. Hard requirements are presented towards quality of the gumboil too. His remainder must not be conducting.
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Old 21st December 2012, 08:09 PM   #4668
oshifis is offline oshifis  Hungary
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Let's add an Rleak external capacitor representing capacitor loss and trace leak.
Of course I meant Rleak external resistor...
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Old 22nd December 2012, 06:31 AM   #4669
SSerg is offline SSerg  Russian Federation
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Let's add an Rleak...
And...? What further? What shall give us the external resistor?
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Old 22nd December 2012, 10:44 AM   #4670
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Actually for the msb leakage should be ok since the dem action Will rescale the lesser bits
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