Building the ultimate NOS DAC using TDA1541A - Page 434 - diyAudio
Go Back   Home > Forums > Source & Line > Digital Line Level

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 17th May 2012, 08:06 PM   #4331
diyAudio Member
 
Join Date: Oct 2009
Location: Brunei
Quote:
Originally Posted by -ecdesigns- View Post
So I designed a new masterclock. The design was optimized for lowest possible impact of power supply fluctuations and loading. By reducing the impact of external factors like power supply and load fluctuations, lower jitter is achieved under similar conditions.

The balanced masterclock was based on low noise RF JFETs. This design showed approx. 500Hz / volt frequency shift, similar as with conventional Collpitts and Pierce oscillators. The main reason for this is varying signal amplitude. So the next logical step was amplitude stabilization. This reduced frequency shift to 10Hz / volt typical.

Next problem is clock loading, any (capacitive) load on the oscillator output will shift oscillator frequency substantially. If the load capacitance changes (dynamically) it will modulate masterclock frequency with up to 10Hz / pF load change. By reducing clock load, the max. load induced frequency shift could be reduced. By using exactly the same load on both outputs and taking advantage of the balanced circuit the frequency shift could be minimized.

Then there is trigger uncertainty. Fluctuations in power supply will also change exact moment of triggering of the connected load. One solution is using a high speed comparator, but these have a certain hysteresis. This means there is a certain "dead zone" where the comparator doesn't respond (output is undefined). This means that the output signal phase can still vary within the hysteresis window.

I ended up using a "see-saw" circuit that is toggled alternatively by both masterclock outputs. If one output is earlier due to power supply rise, same will happen with the other output and the change is canceled as the time between toggling is kept virtually constant. The see-saw circuit also acts as clock buffer.

...

This new timing module offered the most substantial improvements in sound quality I ever achieved with my audio set.
John, can you share a bit more on the clock circuit you are using?
  Reply With Quote
Old 18th May 2012, 06:40 AM   #4332
diyAudio Member
 
-ecdesigns-'s Avatar
 
Join Date: May 2006
Hi studiostevus,

Grundig player has 4 x oversampling so both, WS and DEM clock equal 4 * 44.1 = 176.4 KHz vs 2.8224 MHz.

Quote:
Makes you wonder why grundig didnt go for synchronization via bck
DEM clok rate would then have been 44,100 * 4 * 32 = 5.6448 MHz.

Quote:
Now I am using the #4008 regulators with MODPWR2 preregulators, and I notice a significant detoriation in instrument separation, less clear highs, air, etc.
These are pre-regulators and are only part of the complete power supply. Their task is attenuating ripple voltage in order to get a clean DC voltage for the attached voltage regulator.

In the SD8 player I use a combination of cascaded capacitance multipliers (output ripple below 1mVpp), followed by 4th order balanced RC low pass and local shunt regulators. I also replaced all higher value ceramic caps with SMD film caps because there were problems with piezoelectric effects.

Quote:
This is the BCK signal measured on the tda pin2.
I attached an oscillogram of BCK signal (pin 2) measured on an earlier design (2010)

You need a large bandwidth scope of say 100MHz, suitable probes and have to remove the ground lead and use an adapter tip with short ground connection:

3GHz RF Probe
Attached Images
File Type: jpg BCKATT-1.jpg (85.1 KB, 926 views)
  Reply With Quote
Old 18th May 2012, 07:59 AM   #4333
diyAudio Member
 
Join Date: Oct 2009
Location: Brunei
Quote:
Originally Posted by -ecdesigns- View Post
Hi studiostevus,

These are pre-regulators and are only part of the complete power supply. Their task is attenuating ripple voltage in order to get a clean DC voltage for the attached voltage regulator.
Hi John,
Sorry I was not clear: I meant I have built the MODPWR2 pre-regulators, followed by the mk8 post-regulators of post #4008. As mentioned, they are a step back compared to Salas regs. Frankly, my current setup hardly beats an unmodded philips cd-880.

You have moved on from those as well, and I see now why. No criticism here, just reporting my experiences

Quote:
I attached an oscillogram of BCK signal (pin 2) measured on an earlier design (2010)
ion:

3GHz RF Probe
Reading back a couple of months, I see that you have lowered the voltage of the reclocker, which makes current limiting resistors on BCK unnecessary. That explains why you have a nice square . Why do you still place current limiting resistors on WS and DATA (even though the SD transport outputs suitably levelled signals. I will use level translators to 1.8V to interface with my squeezebox myself) ?

Also, I am very interested in understanding your clock design.

Last edited by studiostevus; 18th May 2012 at 08:29 AM.
  Reply With Quote
Old 19th May 2012, 06:00 AM   #4334
diyAudio Member
 
-ecdesigns-'s Avatar
 
Join Date: May 2006
Hi studiostevus,

Quote:
As mentioned, they are a step back compared to Salas regs.
The problem is caused by the series voltage regulators that turned out to be less suitable for this application.

The TDA1541A-MK11 runs on shunt voltage regulators.

I experimented with many different CCS. They offer some noise / ripple rejection, but a single capacitance multiplier turned out to be much more effective in attenuating rectifier ripple / noise.

So I used two cascaded capacitance multipliers to attenuate rectifier ripple / noise. But since transistors aren't perfect either (they pass higher frequency noise through stray capacitance between collector and emitter), I added a 4th order balanced passive RC filter to tackle this noise. This balanced RC filter contains resistors that also provide required current limiting for the shunt regulators.

I use LED reference voltage as these offer lower noise compared to most zener diodes and (bandgap) voltage references. The LED voltage references are also bypassed with 220uF caps in order to further attenuate noise.

Quote:
I see that you have lowered the voltage of the reclocker
There is no reclocker in the new design, just a divider (divide-by-4) between masterclock and BCK. The divider output connects directly to BCK (no series resistors).

The masterclock runs on 3.6V, the clock buffer for the driving the external digital audio source runs on 3V. The divide-by-4 circuit runs on 1.8V.

Quote:
That explains why you have a nice square
The nice square was measured on a resistive BCK divider (330R / 1K) in 2010. The divide-by-4 circuit (2012) provides much steeper transients. BCK now has 1.8Vpp amplitude (no DC bias voltage).

Quote:
Why do you still place current limiting resistors on WS and DATA (even though the SD transport outputs suitably levelled signals.
SD8 transport outputs 3.3Vpp. These signals are attenuated and a bias voltage is added for minimum switching noise injection through ground-bounce. The resistors reduce WS and DATA signal bandwidth and attenuate the signal amplitude, both lead to reduced ground-bounce in the TDA1541A I2S input circuit.

Quote:
Also, I am very interested in understanding your clock design.
The TDA1541A-MK11 module runs on two synchronized JFET Colpitts oscillators that share one 11.2896 MHz crystal. One output drives the BCK divider, the other drives the digital audio source through a clock buffer.
  Reply With Quote
Old 19th May 2012, 07:18 PM   #4335
galeb is offline galeb  Spain
diyAudio Member
 
Join Date: Apr 2008
hi john, could you post the signal conditioning schematic?
__________________
galeb saleh
Sarte Audio Elite´s technical audio department
  Reply With Quote
Old 20th May 2012, 06:34 AM   #4336
diyAudio Member
 
-ecdesigns-'s Avatar
 
Join Date: May 2006
Hi Galeb,

Quote:
hi john, could you post the signal conditioning schematic?
I attached the I2S attenuator / bias circuit for WS and DATA.

Input signal amplitude equals 3.3Vpp. Resistor of 1K is placed in series with the signal (R22, R23).

Resistor of 820R to GND and 2K7 to 3.3V power supply provide the bias voltage and together with the 1K series resistor they provide required signal attenuation.

The circuit provides approx. 1.76Vpp and a bias voltage of 1.115V.
Attached Images
File Type: jpg I2S.jpg (33.2 KB, 891 views)
  Reply With Quote
Old 20th May 2012, 07:51 AM   #4337
diyAudio Member
 
Join Date: Dec 2008
Hi EC,

in case of a classic Marantz/Philips CD Player what would be the value of the I2S input signal ? so I would like to know in accordance with this value the aprox. values of the resistors for the I2S attenuator - because I believe that your SD Card transport offers other/custom signal amplitude for the I2S signal compared to a readily available CD player , so these resistor values from your schematic would not be compatible for us who are modding our cd players using your advices;
Thanks
__________________
== There are no limitations to the self except those you believe in ==
  Reply With Quote
Old 20th May 2012, 09:22 AM   #4338
galeb is offline galeb  Spain
diyAudio Member
 
Join Date: Apr 2008
Thank you John,

And the DEM part?, how is it now?
__________________
galeb saleh
Sarte Audio Elite´s technical audio department
  Reply With Quote
Old 23rd May 2012, 07:59 AM   #4339
diyAudio Member
 
-ecdesigns-'s Avatar
 
Join Date: May 2006
Hi luxury54,

Quote:
In case of a classic Marantz/Philips CD Player what would be the value of the I2S input signal ?
The resistor values for 5V TTL signal levels of WS and DATA would be approx. 2K series resistor, 680R to ground and 5K6 to +5V. BCK is problematic, perhaps an ultra high speed level translator or divider / level translator could be used here.
  Reply With Quote
Old 26th May 2012, 10:33 AM   #4340
galeb is offline galeb  Spain
diyAudio Member
 
Join Date: Apr 2008
Dear John,

Could you please post the MK11 schematics?

Kind regards,
__________________
galeb saleh
Sarte Audio Elite´s technical audio department
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off



New To Site? Need Help?

All times are GMT. The time now is 08:59 PM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright ©1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2