Building the ultimate NOS DAC using TDA1541A

There are no believers here boy ( rfbrw) , maybe just you and your unknown knowledge and experiences :rolleyes:

nobody claims anymore about the 17 bits stuff , we know that the signed magnitude setup is working as 16 bits ,but we still have trouble to sort out the logic section , this is it

and what we look for is, none of your sarcastic shi.... words , stay in your dark cave you like so much ......

Alexandre , I can't be more clear , some of us still have trouble with the logic section , so as said before , if you have some help to give about it , it will be much appreciated

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The intended 17bit DAC uses the 4mA of one DAC for the positive half of the wave and the other DAC for the negativ half. Both DACs add together and provide a total of 8mA.
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Funny. PMD100.

Imagine (simplified): one dac outputs an analog signal between 0 and 10V (after IV etc), so it would be centered around 5V hence MSB would flip between the 0-5 and 5-10V ranges. Now put 2 such dacs on top of each other: the range doubles to 0 to 20V, so MSB would switch between 0-10 and 10-20, hence each dac performs one full have of the signal. Data needs to be prepaired for that obviously and the MSBs of the 2 individual dacs are no MSB any more: you can't have 2 MSBs in one signal. That's what the glue logic discussed is for...

What about the other segmented dacs out there that were mentioned earlier? Are they all 1+1=3? The famous 1704 etc. have two MSBs per channel?!? Think, come on.
 
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I did think about it.

To do it "perfectly" requires a adder, the logic will be way more complicated.
Sorry, but there's no point talking about 17 bits here, this is diy, no one here is implementing the adder, afaik.
Not to mention the extra current source that is necessary, also equal to 1 lsb (to avoid overflow at the exteme of the scale).

Summarizing, to do it perfectly you need: two 16 bit dacs very well matched, one extra current source equal to 1 lsb, and glue logic that is way more complex with full adder for 17 bits.
 
What about the other segmented dacs out there that were mentioned earlier? Are they all 1+1=3? The famous 1704 etc. have two MSBs per channel?!? Think, come on.
They work but you clearly do not understand why they work and why the TDA1541 will not stack in the way you think. Given the information available I find it amazing that such a simple concept eludes you. How can you not grasp counting?
 
Very rude. I think you read more in my words than I meant. Plus you think you know better what I think than myself. Claim as much as you want, but honestly it will never be a contribution to this thread.

I don't claim that it works as I described with my limited english BTW. I described it only simplified to help members like you - but it seems hopeless. Well maybe I didn't grasp that you are not interested in the topic itself but just want to proof others being wrong. Thanks, I am done.
 

For the very stupid: stack two 1.5V batteries on top of each other and you will get 3V. Consider dacs as batteries (with the ability to output very fine grained) and you will get double resolution (if fed with enough data). How this can be done is discussed since thausands of posts in this thread. I am not the inventor of this idea BTW, so why don't you not just read and get your brain around it?!
 
For the very stupid: stack two 1.5V batteries on top of each other and you will get 3V. Consider dacs as batteries (with the ability to output very fine grained) and you will get double resolution (if fed with enough data). How this can be done is discussed since thausands of posts in this thread. I am not the inventor of this idea BTW, so why don't you not just read and get your brain around it?!
It is and always was pretty obvious how it is done especially once you get rid of the 17-bit nonsense but, alas, I can't see you cracking it anytime soon not if you actually think your battery analogy is valid. "Consider dacs as batteries" ? Do I really have to point that the output of a battery depends mainly on its chemistry as opposed to a dac whose output depends not only on its input but also on its type? I do one find particular aspect of this oddly interesting.
You have no idea how to get this to work and yet you are convinced you are right. That being the case, surely a sage of your calibre would have this working in the blink of an eye.
 
Hi,

Something for fun. I did consider a DAC using TDA1541 to allow over 16 Bit before.

First, typical SNR at digital silence (no dither noise) is ~ 110dB. If we use 4 pcs in parallel (yes, that seems unreasonable, but why not) we can expect ~ 116dB SNR.

If we add a fifth TDA1541 and feed it with a delayed signal so it only received the LSB's below Bit 16, we have now a current signal that is proportionate to the LSB's and another that is proportionate to the MSB's.

It would also be possible to use simultaneous mode with suitable logic, but more complex. In I2S we simply use a pair of 8 bit shift registers and we have a 16 Bit delay.

IF we can sum them with correct scaling we get in effect a 32 Bit DAC (it will accept 32 Bits) with ~ 116dB SNR.

How can we do the summing correctly?

We need to reduce the current by a factor of 16384.

Let's start with 1R I/U conversion resistance on the LSB TDA1541. We get a full scale voltage of 4mV P-P.

We now take a resistor that will, with 4mV P-P input produce 4mA/16384 (or 16mA/65536).

So we need a 16.384k Resistor from the 1Ohm I/U conversion resistor to the output and we SHOULD have our 32 Bit / 192kHz / 116dB TDA1541 based DAC.

Of course 16.384k does not exist.

But 3.92k (0.1%) resistors exist and if we use four in series, we need find 704 Ohm more.

So we add 330R + 270R + 51R + 51R + 1R + 1R (0.1%).

In reality we probably need to trim the resistor value with an analyser and (say) a -60dB signal for lowest THD in practice.

Ok, that's just something that I considered at one point to use up 1,000pcs TDA1541A that were in stock for a "crazy" DAC which would obviously been limited to less than 200 Units.

If we do not need 116dB SNR AND we want to use only one TDA1541, well, in principle we could use 24 bit's I2S from the source and use a 74AHC595 or similar with an R2R ladder or a set of binary weighted resistors to convert the 8 LSB's and a similar resistor to ground and resistor to output to convert a few extra bits.

Actually, Denon had a similar scheme in 1980's/90's CD Players where 16 Bit DAC's were made into 18 Bit DAC's.

Just some thoughts for something that may be simpler to work out than the conversion sign magnitude operation.

Thor
 
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Thor, your idea could work in theory. But multibit DACs have a common limitation: the MSB current should have at least 2x less uncertainty than the value of the LSB current. In a 16-bit system the uncertainty (accuracy) should be <1 LSB that is 1/32768 of the MSB value. Imagine that in a 24-bit sytem. It is physically impssible, we talk about so tight MSB (and MSB -1, MSB -2, etc.) tolerances and so small leakage currents, so low TCs, that simply do not exist. Otherwise Philips would have used R-2R ladder not only in the lowest 6 bits, but up to all 16 bits, instead of the tricky active current scaling in the higher 10 bits.
The catch is always in the accuracy of the MSB, not that of the LSB. In theory the tolerance of the LSB could be as much as 50% or so.
 
A few notes.

Seeing THD in the TDA1541 is quite low (better than -90dB at full scale) due to the DEM circuit I think the MSB error is quite small... I'd not worry about that part.

Second, there is nothing R2R whatsoever in the TDA1541. Everything is based on switched current sources and multi-emitter current division. It's all also bipolar and in fact internally a version of ECL Logic.

Only the input pins are not differential. Limiting the signal swing on these (needs to be thermally compensated) and avoiding saturation of the input stage brings major improvements.

So I'm afraid a lot of the thinking and concepts coming from CMOS circuitry with R2R ladders are not really applicable.

Thor
 
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Hello,

Working on a E188CC I/V from your ECC88 article. Trying to follow...

How will you, please, limit the input swing ? At least what's your prefered method here ?

Does the improvment associated with temp comp outweigh whatever additional circuitry is involved?

I also plan to add it a Mu follower voltage à la Moglia.
 
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