Building the ultimate NOS DAC using TDA1541A

Yes he did some correction but only on the I2S version , he never modified the left justified ( post 6116 ) version and then I thought this was a good version , it seems I was wrong , this is it

I will stand by for a moment and decide what to do , build an I2S version seems to be the way to go , at least for my skills

Thanks again for your help jpk73 (y)

.
 
You can see John's comment in the schematic "0.5bit delay" and "1.5bit delay". Hence you can make a version for I2S and add a bridge solder jumper to link out U5. Also you might want to add 0R22 mems resistors near each ic output to avoid signal reflection.
 
Last edited:
TDA154X.png
 
I was taking a look at it, and posted above, the figure from page 142 of the dissertation of Rudy J. van de Plassche
(HIGH-SPEED AND HIGH-RESOLUTION ANALOG-TO-DIGITAL AND DIGITAL-TO-ANALOG CONVERTERS)

Unrelated question: I am curious to know how well the channels of the TDA1541A match, in amplitude. If any of you fellows looked into it please share the results.

Thanks,
Alex
 
It's possible to add DACs just like batteries on top of each other regardless of internal architecture, as long as the analog outputs are added correctly together and the digital data is prepared properly. This is discussed in this thread since a couple of thousands posts ;-)

Of course MSB has a value: either one or zero, as all other bits in the stream. MSB is just the first piece of information. In some formats it's used to define the polarity, but not in all formats...
How is the magical thinking working out?
 
  • Like
Reactions: 1 users
Unrelated question: I am curious to know how well the channels of the TDA1541A match, in amplitude. If any of you fellows looked into it please share the results.

Thanks,
Alex
Разброс значений выходного тока полной шкалы не превышает 15% (даташит, страница 6). На эту цифру и следует ориентироваться.
 
в любом случае 15% выглядят глупо высокими. Это вариация на 1,4 дБ. Я очень сомневаюсь, что это когда-либо будет так
Firstly, this is not my imagination, but data from the datasheet. Secondly, this is a limiting value and on average the deviation will be much less.
 
  • Like
Reactions: 1 user
I don't want to brag, but I am pretty much proven right at this point. Do you fellows remember what I said? It is possible to make it work, even if there is 1 lsb error in the midscale (this error is probably unimportant).
Usually, sign magnitude dac chips implement a "technically perfect" solution that corrects the lsb error, this is described in the ad1862 and pcm1702 datasheets (as mentioned already).
With the 1541, the error due to mismatch of the channels will be larger than the missing lsb at midscale (lsb equals 60 nA in the tda1541). Not to mention noise in the I/V converter (resolving the lsb is not easy).
My conclusion is: carry on. This should work well. Actually, it is proven that it's possible to make it work well, see:
https://www.diyaudio.com/community/...on-of-sound-quality-between-some-dacs.386815/
 
Any useful help still welcome for this setup , the dual mono sign magnitude is not the issue here , I / we know that it work , troubles are in the logic section , left justified for sure , but also in the I2S one , a lot has been publisched here for those who really whant to help :)


.
 
  • Like
Reactions: 1 user
Actually, I have helped with this sort of issue here before, for example I presented a working scheme for stopped clock tda1543, dual mono, that I used with very good results.

The thing is, I prefer to use small fpga boards, I can deal with the noise they generate.
If you're not able to make it work with the discrete logic maybe you should consider this other option.


Any useful help still welcome for this setup , the dual mono sign magnitude is not the issue here , I / we know that it work , troubles are in the logic section , left justified for sure , but also in the I2S one , a lot has been publisched here for those who really whant to help :)
 
Last edited: