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Old 4th January 2012, 12:54 AM   #4101
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Sometimes professionals use things for marketing reasons. I agree with ecdesigns, you really do not want to add more HF hash than absolutely necessary - digital stuff (DACs, logic, filters, MCUs) already adds plenty... That's not to say some SMPSUs can't be quiet - if you're interested check out some of Jim Williams' work in appnotes on the Linear Tech website. To get a quiet SMPSU you'll find you have to compromise its efficiency, so the advantage of using it is reduced in many cases.
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Old 4th January 2012, 07:55 AM   #4102
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Hi zjaacko

Quote:
The point for a smps was as follow.
A few months ago I read again the review of the linn cd12 on the side of stereophile .One of the remarkable points was the use of a smps. If a professional use it. why don't a diy'er use it?
SMPS is used for higher efficiency and saving cost on parts, (switching) noise is irrelevant here as long as it meets EMC specs. Unless the SMPS runs fully synchronous (phase-locked) with the DAC system clock, both power supply switching frequency (and harmonics) will inter-modulate with the system clock and cause distortion.

The biggest problem with CD transports is mechanical vibration that in turn affects CD transport servo loop interference spectrum. Linn CD12 is housed in 2 solid blocks of aluminum in an attempt to reduce mechanical vibrations. Mains transformers can induce mechanical 50 / 60 Hz resonance, so a SMPS makes some sense here as it reduces low frequency mechanical resonances.

I use a SD-transport that is completely insensitive to mechanical vibration, it consumes only 0.5 watts (display and 32Gb SDHC card included), so a high efficiency SMPS would make little sense here.
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Old 4th January 2012, 08:12 AM   #4103
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John, is mk8 now finished?
Any pictures and impressions that you can share?

Thanks!
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Old 4th January 2012, 09:08 PM   #4104
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Quote:
John, is mk8 now finished?
No the MK8 design was abandoned. The common mode power supplies revealed (much) more flaws .... causing many sleepless nights.

Today I finally completed the MK9 prototype setup, based on the remains of the MK8 prototype PCB.

All I can say for now is that it runs on balanced power supplies plus one micropower CCS / shunt regulator and is based on a new masterclock concept. It is driven by a SD transport with new software.

Quote:
Any pictures and impressions that you can share?
No pictures yet, prototype looks too messy. Perceived sound quality
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Old 5th January 2012, 06:36 AM   #4105
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Wow... That's a surprise... Just bought the parts for mk8... Ah well, all for the better end-result!

What weaknesses did you discover in mk8?
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Old 5th January 2012, 09:07 AM   #4106
galeb is offline galeb  Spain
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I'm using a similar power supply concept from several months, and since then I've realized even more that the importance of a good oscillator is extremely critical. With my last oscillator design (P.N. of -184bdc/hz@1Khz and less than 1ppm) the sound has improved incredibly. I have now much more less grain, much more wide stage, better bass, better voices, even less background noise, etc.......for output I'm using a kind of optimized Aikido stage with tubes, and IMHO this is better than using a mosfet or whatever of solid state device. Yes, a capacitor is not good, but if you find the perfect one, or at least, the more adecuate one, the sound becomes more real, more like an instrument, more relaxed, etc.....

I'm now using 13 power transformers for a total of 16 regulations, this DAC has 3 chassi, 2 for the supplies, and 1 for the DAC. 9 of the transformers are to supply the SPDIF receiver, the TDA, the logic, the 2 clocks, etc....and this supplies are based on my concept, similar to your's, but with the simulations, I've achieved much more reject to HF interferences and much more isolating, I reach, for 1Khz -179db and for 1Mhz -422db. And the bandwith goes up to 11Mhz.

Of course, supply has to be fully balanced, if not I didn't get this results. And the best of all, I use an USB to RCA converter from M2 tech, named Hi Face, with an incredible results using the computer to transfer the music to the DAC.

Kind regards to all.
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Old 5th January 2012, 12:08 PM   #4107
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Quote:
What weaknesses did you discover in mk8?
The common mode power supplies and removal of diodes in masterclock, I2S attenuators and DEM clock circuit resulted in higher transparency. This in turn revealed more flaws mainly problems with vocals.

In an attempt to fix this I further improved power supply by converting the common mode power supplies to balanced power supplies. These offer similar performance as low noise battery power supplies. Instruments further improved, but vocals remained a bit problematic.

Next I built a 9th order analogue brickwall filter (Chebychev, 0.01dB passband ripple), this solved most of the flaws with vocals but caused significant reduction of perceived sound quality (dull, tinny low resolution sound). Digital brickwall filters caused similar problems. I noticed similar degrading effects with other digital audio sources that had digital filtering.

I figured the problem had to be caused by timing (jitter). Note that I already slave the source and spent years on reducing jitter with this almost ideal configuration. Typical USB and S/PDIF digital audio source issues are non existent with this concept.

So I designed a new masterclock. The design was optimized for lowest possible impact of power supply fluctuations and loading. By reducing the impact of external factors like power supply and load fluctuations, lower jitter is achieved under similar conditions.

The balanced masterclock was based on low noise RF JFETs. This design showed approx. 500Hz / volt frequency shift, similar as with conventional Collpitts and Pierce oscillators. The main reason for this is varying signal amplitude. So the next logical step was amplitude stabilization. This reduced frequency shift to 10Hz / volt typical.

Next problem is clock loading, any (capacitive) load on the oscillator output will shift oscillator frequency substantially. If the load capacitance changes (dynamically) it will modulate masterclock frequency with up to 10Hz / pF load change. By reducing clock load, the max. load induced frequency shift could be reduced. By using exactly the same load on both outputs and taking advantage of the balanced circuit the frequency shift could be minimized.

Then there is trigger uncertainty. Fluctuations in power supply will also change exact moment of triggering of the connected load. One solution is using a high speed comparator, but these have a certain hysteresis. This means there is a certain "dead zone" where the comparator doesn't respond (output is undefined). This means that the output signal phase can still vary within the hysteresis window.

I ended up using a "see-saw" circuit that is toggled alternatively by both masterclock outputs. If one output is earlier due to power supply rise, same will happen with the other output and the change is canceled as the time between toggling is kept virtually constant. The see-saw circuit also acts as clock buffer.

The see-saw circuit drives the divide-by-4 circuit that generates the balanced bit clock.

Other important thing is dynamically coupling masterclock and timing circuit power supplies in order to achieve tracking between all power supplies. This means that when the masterclock output amplitude rises due to a slight power supply voltage increase, same will happen with power supplies of connected timing circuits. This in turn helps to reduce trigger uncertainty between cascaded timing circuits.

Then there is ground-bounce. Ground-bounce also changes the exact moment of triggering and should be reduced to lowest possible levels. Ground bounce depends mainly on signal amplitude, rise time and (capacitive) loading. Fast rise time is required, so no changes can be made here. Signal amplitude was minimized by running the masterclock on 3V supply, see-saw circuit / buffer on 2V and BCK dividers on 1.6V (minimum voltage to ensure reliable triggering of TDA1541A bit clock). This also means that I2S attenuator for BCK is no longer required. Capacitive loading was minimized by using devices with lowest possible input capacitance and using very short connections.

Final improvements could be made by using a cleaner than clean power supply with lowest possible impedance that remains constant over largest possible bandwidth. This only works if the regulator output is located as close as possible to the masterclock power supply connection, (millimeters, not centimeters).

After testing many more voltage regulator concepts (powered by the already very clean balanced power supplies) I ended up using a micropower CCS / shunt regulator that is designed to offer 10mA load current @ 3V (input voltage equals 5V). I used low noise RF JFETs for the constant current sources and low noise bipolar transistors for the actual regulator.

The masterclock, micropower CCS / shunt regulator, see-saw circuit and BCK divider were squeezed on a 40 x 25mm PCB with ground plane in order to keep connections as short as possible and offer required screening.


This new timing module offered the most substantial improvements in sound quality I ever achieved with my audio set. The sound flows with zero effort, and is very airy, bright, clean and realistic with stunning resolution and pinpoint focus. The problems with vocals vanished too.

Previous DAC designs also performed very good, but lacked the transparency of the MK9. So flaws were masked and everything seemed just fine. By removing the masking interference, the flaws become clearly audible.

Compare it with a tiny scratch in the paint of a new car. If the car paint is covered with some dirt, the tiny scratch isn't even noticed and all seems fine. But when the car is cleaned-up and the paint polished to high gloss, the tiny scratch that has always been there now becomes annoying. Then one starts looking for more scratches and is likely to find some.
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Old 8th January 2012, 12:17 PM   #4108
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So if i may summarize:

- the reclocker circuit remains the same, and can be considered 'optimal'
- the output stage remains the same
- the psu has changed in search for better ripple suppression
- the masterclock has changed to utilize the better psu to further reduce jitter

As mentioned earlier, i am using a dicrete diamond circuit for i/v. I would like to re-try some tubes, in a Gomes amp config as suggested by Thorsten. My previous attempt using SRPP was unsuccessful (too much 2nd harmonics).

... But i think/hope John will pass me by with publication of his improved schematics... All in all this has been a great learning experience and hope it will continue!
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Old 8th January 2012, 03:28 PM   #4109
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Quote:
Originally Posted by studiostevus View Post
So if i may summarize:

My previous attempt using SRPP was unsuccessful (too much 2nd harmonics).
Hi StudioStevus,

I'm curious about your experiences with the SRPP. Did you run a simulation from LT Spice, or was your testing by listening and measuring...or both?
What number did you consider "too high" for 2nd order harmonics?
I too am testing flavors of tube stages for the TDA1541A. I'm using a single Mills MRA5 series resistor for I/V.
I presently have an SRPP set up in LT Spice that looks not too bad; with just a single second harmonic, about 70dB below the fundamental. I was unable to tune it down any further without trading off something, either power dissipation on the tubes or too much gain. I think I'll try building this one today.

I also built an ECC83 ultra-low distortion gain stage (design by Max Robinson) ahead of a Broskie SRPP unity gain follower. The LT Spice response was nothing short of phenomenal, after some tuning the second harmonic was at -98dBc, and the third was at -107dBc. After building it I gave it several good listening tests it's got the goods, but still not sure what's missing. Since the connection of the stages requires capacitors, I did a fair amount of capacitor swapping. There's a total of 4 per channel including the output at the SRPP. I decided the sound is a little veiled, perhaps masked...something I can't put my finger on. I'm using good tubes, TFK ECC83 at the front and Siemens CCa on the SRPP. Some of the caps I've tried include Clarity, Audience, Russian K42Y, Russian FT-2, Obbligato. I appreciate there's a fair amount of phase shift here, but group delay through the circuit across the 20-20KHz band is under 1.3ms and should not be a factor.

Please let me know about your experience and thoughts with the SRPP, I am quite interested!

Gary
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Old 8th January 2012, 03:41 PM   #4110
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I built the circuit advertised by Lukasz Fikus, using 6n2p tubes.

I only have listenining impressions unfortunately:
- on the positive side, i found it very rhytmic, it was really toe-tappingly nice
- the highs and high-mids were smooth and nice
- 3d was good

- on the other hand... Transparency was limited (noise high?)
- low-mids and bass were very full and fat... Way over the top in my view

To me, it just became very unnatural....
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