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Old 4th November 2010, 09:57 AM   #3491
fff0 is offline fff0  Singapore
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Quote:
Originally Posted by -ecdesigns- View Post
...........
This is why I use "power" MOSFETs in the combined input / driver stage instead of low wattage JFETs like the 2SJ74 or 2SJ109 for example.
You tried using or considering the high wattge Jfets like the ones from Semisouth?
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Old 4th November 2010, 02:00 PM   #3492
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Hi fff0,

Quote:
You tried using or considering the high wattge Jfets like the ones from Semisouth?
I need certain amount of gain (Yfs), P-channel FETs, and low input capacitance (gain stage in grounded source configuration). This excludes SemiSouth power JFETs. I am currently using matched 2SJ79 MOSFETs in the Circlotron driver stage.

For utmost transparency, very clean power supplies are required, and I plan to test some discrete (shunt) regulators for this driver stage as well.


There are some interesting developments with the TDA1541A-MK4 output stage. Similar as with the Circlotron driver stage, power MOSFETs also perform much better here. Power MOSFETs can offer lower input impedance (grounded gate buffer), so TDA1541A +/- 25mV output compliance can now be fully met (depending on MOSFET properties). The high power devices also seem to have less problems with thermal memory when running on low power.

The required gate bias voltage is tapped from the powerFET drain using a 250K trimmer. The gate is short-circuited to ground (ac signals) using a 1uF film cap. The very small ac signal that manages to seep through the RC filter causes a very small amount of negative feedback.

The MOSFET buffer offers cleaner sound and more "body" (midrange). The sound (clarity) reminds of tube output stages, but without the usual sound coloration and noise.
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Old 4th November 2010, 02:39 PM   #3493
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Hi jameshillj,

Quote:
Yes, Thanks John, for this "Stepped Rectifier Network" design - such a simple thing that works like a charm!
I already (had to) use them in the DAC power supply. After hearing the impact on power amplifier supply, I probably never use a conventional rectifier in these kind of circuits again.

I added an oscillogram to illustrate the effect of a 3-stage stepped rectifier (low, high, full charge current). The voltage is measured across two inches of thin copper wire that is placed between transformer and rectifier.


First picture shows conventional rectifier, setting 10mV/div.

It shows large peak charge current (positive pulse) and a negative pulse caused by transformer back emf.

The second picture shows a 3-stage stepped rectifier added to the same circuit. Both peak charge current and transformer back emf are now reduced, setting 10mV/div.

The stepped rectifier tackles rectifier switching noise right at the source, by doing so it also reduces EMI. Other nice side effect is that the smoothing caps now run cooler so their service life is increased.
Attached Images
File Type: jpg conventional-rectifier.jpg (41.6 KB, 964 views)
File Type: jpg 3-stage-stepped-rectifier.jpg (44.3 KB, 936 views)
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Old 4th November 2010, 05:33 PM   #3494
fff0 is offline fff0  Singapore
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Quote:
Originally Posted by -ecdesigns- View Post
Hi fff0,

I need certain amount of gain (Yfs), P-channel FETs, and low input capacitance (gain stage in grounded source configuration). This excludes SemiSouth power JFETs. I am currently using matched 2SJ79 MOSFETs in the Circlotron driver stage.
Opps, I misread, you are referring to driver stage.

Quote:
Originally Posted by -ecdesigns- View Post
........
For utmost transparency, very clean power supplies are required, and I plan to test some discrete (shunt) regulators for this driver stage as well.
Applying this shunt regulator to TDA1541A-MK4's output stage and DAC chip input as well?

Quote:
Originally Posted by -ecdesigns- View Post
..........
There are some interesting developments with the TDA1541A-MK4 output stage. Similar as with the Circlotron driver stage, power MOSFETs also perform much better here. Power MOSFETs can offer lower input impedance (grounded gate buffer)........
In Nelson Pass's delite amp, I got the opportunity to check out the difference between IXYS depletion mode Mosfet and Semisouth depletion mode Jfet. Mosfet sounds fuzzy in comparison to say the least. As reported in other thread, I do find that Jfet is more superior in many ways than a mosfet, perhaps due to the lower input capacitance of the Jfet Gate. Yes, High Voltage and bias do better in the amp.

However, I am not sure how will it be applicable to you in TDA1541A-MK4 output stage. Give it a thought?

Last edited by fff0; 4th November 2010 at 05:39 PM.
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Old 4th November 2010, 07:19 PM   #3495
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Talking about fet's, does anyone know where to buy the 2sk170 in the netherlands?
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Old 5th November 2010, 03:40 AM   #3496
Bigun is offline Bigun  Canada
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I think I'm just being a bit 'slow' today, but I'd really like to see a sketch / schematic of this stepped rectifier to understand what you mean by this - it's definitely caught my attention !

Thanks.
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Old 5th November 2010, 07:45 AM   #3497
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Hi Bigun,

Quote:
I think I'm just being a bit 'slow' today, but I'd really like to see a sketch / schematic of this stepped rectifier to understand what you mean by this - it's definitely caught my attention !
I attached a diagram of the stepped attenuator concept (repost).

The diodes act as (threshold) voltage controlled switches. When the diode doesn't conduct (voltage across it is below threshold voltage) the switch is open. When the diode conducts (voltage across the diode exceeds threshold voltage) the switch is closed.

The diodes marked red in the diagram are conducting and can be viewed as a closed switch. The ones marked black are not conducting and can be viewed as an open switch.

It is important to place the stepped rectifier between the existing (bridge) rectifier and the smoothing cap(s).

back to the diagram,

First sketch shows first step, only diode D1 conducts, this is the diode that's part of the existing (bridge) rectifier. The voltage difference between trafo and smoothing cap is too low for D2 and D3 to conduct. So the current can only flow through R1 (47R) providing lowest charge current.

Second sketch shows second step, the voltage exceeds threshold voltage of one more diode. D3 cannot conduct as there is no bypass resistor, so D2 has to start conducting and creates a second bypass through R2 (10R). This increased charge current is added to the current already flowing through R1. This provides medium charge current.

Third sketch shows third step, the voltage exceeds threshold voltage of both, D2 and D3. Now both, D2 and D3 can conduct, bypassing both R1 and R2. This provides full charge current.

This process takes place within fractions of milliseconds and the resistors only dissipate very little power. When the input voltage drops, the charge current is reduced in a similar way, providing minimum charge current just before all diodes stop conducting. This reduces trafo back emf as can be seen on the oscillograms in post #3493.

Resistor values can be adapted to charge current requirements. Higher resistor values for low power applications and lower resistor values for high power applications.

The amount of diode / resistor paths can be increased to provide even smoother charge current control (more intermediate steps).
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Old 5th November 2010, 08:41 AM   #3498
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Hi fff0,

Quote:
In Nelson Pass's delite amp, I got the opportunity to check out the difference between IXYS depletion mode Mosfet and Semisouth depletion mode Jfet. Mosfet sounds fuzzy in comparison to say the least. As reported in other thread, I do find that Jfet is more superior in many ways than a mosfet, perhaps due to the lower input capacitance of the Jfet Gate. Yes, High Voltage and bias do better in the amp.
Depletion power MOSFET IXTH20N50D:
2500pF input capacitance.

Semisouth power JFET SJEP120R100:
670pF input capacitance.

Input capacitance (670 ... 2500pF) appears across 47K input impedance.

Apart from the lower input capacitance, power JFETs like the SJEP120R100 may offer better linearity.

It's also a single-ended power amplifier that is highly sensitive to power supply noise.

In my application I use the MOSFETs as grounded-gate buffer. The 2Sk216 has 90pF input capacitance and Yfs of 40. The input capacitance (gate-source) appears across a low impedance of around 10 ... 20 Ohms (grounded gate buffer input impedance). The current running through the powerFET is only between 3 and 7 mA. In this application the advantage is the low current running through a powerFET designed to handle much higher power dissipation (30W peak at room temperature for the 2SK216). This reduces the thermal memory effect and provides much cleaner sound compared to devices (JFETs) that are only rated at 200mW.
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Old 5th November 2010, 08:59 AM   #3499
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Good morning John,

I'm working on a 1541 DAC, built on Olivers (DVB Project) boards, but with some differences. I'm using your MK4 I/V stage and have implemented your stepped rectifiers.

Regarding the stepped rectifiers you mentioned in your last post, the resistor values depend on the application. As far I've seen you've posted two different pictures so far. In one you used 10R and 47R, in an earlier scheme I think I saw 47R and 470R. Is it possible to give a rule of thumb for dimensioning these, lets say depending on the current drawn.

Using Olivers boards as a base, which has implemented an earlier stage of your I2S attenuatuion and DEM reclocking (with 74HC02 or NL17SZ02), I'd like to move forward to your newer design. For both, I2S attenuation and DEM reclocking you are using now 74AU1G74, which I unfortunately cannot find anywhere. Would you mind giving a hint for a source?

Thanks for sharing your your projects here!!!

Regards Ernst
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Old 5th November 2010, 11:02 AM   #3500
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Searching not only for the name but for function brought this:

TEXAS INSTRUMENTS|SN74AUC1G74DCUR|LOGIC, 74AUC1G, D FLIP FLOP, US8 | Farnell Deutschland

Could be the part, couldn't it?

Ernst
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