>like place the current source needed for symmetry around zero on the substrate.
This is what almost bipolar output DAC does, but TDA1541A doesn't. (though it may not on the substraight but upper side.)
DC output capability and its accuracy does not needed in audio equipment, we just are able to cut the DC with a capacitor. We do not need bipolar output DAC for audio, in fact.
An example of such current source is BPO pin of PCM56. It seceded PCM1702 and PCM1704 but the current source is internally connected. In fact it is not hi-Z current source but a voltage source and a resistor.
>+FS 1 1111 1111 1111 1111 (hmmm....)
PCM1704 have an extra 1LSB size segment!
This is what almost bipolar output DAC does, but TDA1541A doesn't. (though it may not on the substraight but upper side.)
DC output capability and its accuracy does not needed in audio equipment, we just are able to cut the DC with a capacitor. We do not need bipolar output DAC for audio, in fact.
An example of such current source is BPO pin of PCM56. It seceded PCM1702 and PCM1704 but the current source is internally connected. In fact it is not hi-Z current source but a voltage source and a resistor.
>+FS 1 1111 1111 1111 1111 (hmmm....)
PCM1704 have an extra 1LSB size segment!
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You are mixing to separate issues. There is the addition of 1/2 the full scale output current to centre the I/V stage around zero volts.
There is also the addition of 1 LSB's worth to current to centre one of the straight binary dacs used in the colinear process to prevent having two zeros. This only applies to the PCM63, PCM1702 amd PCM1704. The PCM63 datasheet is clear on this.
Why create 17bits of data only to throw one bit away? Just send the original 16.
Rfbrw,
As John pointed out, the main premise here is that the zero crossing is cleaner with the segmentation.
Without segmentation, the msb will always change state at each zero crossing. And the msb is the most critical current source wrt accuracy. The worst case transition is 0111 1111 1111 1111 to 1000 0000 0000 0000.
With segmentation, the worst case will be moved away from the zero crossing region. We can look at the msb of each segment and it will only change state away from the zero crossing region. At the extremes of the waveform. Our hearing is least sensitive at these extremes, and most sensitive at the zero crossing.
What´s more, you needn´t throw one bit away. I will use a custom dither plugin. I use JRiver which accepts VST plugins.
I´d ask this guy to do a 17 bit version of his excellent free dither.
Not Just Another Dither/CD | Airwindows
NaturalizeDither | Airwindows
Thanks,
Alex
As John pointed out, the main premise here is that the zero crossing is cleaner with the segmentation.
Without segmentation, the msb will always change state at each zero crossing. And the msb is the most critical current source wrt accuracy. The worst case transition is 0111 1111 1111 1111 to 1000 0000 0000 0000.
With segmentation, the worst case will be moved away from the zero crossing region. We can look at the msb of each segment and it will only change state away from the zero crossing region. At the extremes of the waveform. Our hearing is least sensitive at these extremes, and most sensitive at the zero crossing.
What´s more, you needn´t throw one bit away. I will use a custom dither plugin. I use JRiver which accepts VST plugins.
I´d ask this guy to do a 17 bit version of his excellent free dither.
Not Just Another Dither/CD | Airwindows
NaturalizeDither | Airwindows
Thanks,
Alex
Easy on the snake oil. Segmentation is just an expensive word for dac. MSB will do what the MSB always does in a signed dac and is not the issue. It is all the bits changing state at the same time. That is addressed by the combination of the two the dacs and the way in which their output currents are summed.
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No snake oil. John´s proposition looks good and I am thankful he posted. I will find the time to build it.
And yes the MSB is the critical current source, why do you suppose dacs have MSB trims?
What John did is exactly what burr brown did with their sign magnitude dacs, only 17 bits. One 17 bit dac from two 16 bit dacs. But this one has +-4mA output! Or rather zero to -8mA. Whatever way you want to see it.
Now, look at the msb of each 16 bit segment: it will only change state at -6 dBFS. So the least accurate current sources only toggle at the extremes of the waveform and this is good!
A red herring. MSB trim has nothing to do with this.
Not quite. The PCM63 has a 20bit input register. The TDA1541A only has a 16bit input register. It is simply not necesary to dither when all you need to know is the state of the MSB of the 16-bit word. Dither and 17/24 bits are an unnecessary distraction. Then again TDA1541 types do seem to like pimping their icon.
I´m not sure you get it Rfbrw. This is no longer a 16 bits dac. It is a 17 bits dac and to make good use of the LSB we need two things: high res material and good dither which will need to be custom. AFAIK there´s no ready made solution for a dithered 17 bits output.
Give me a moment to include the worst case transition in that sketch I made.
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Now we have two worst cases, also called "major carry" iirc. This gives the largest glitch at the output. But, with the segmented 17-bit dac, this only happens near the positive and negative peaks of the waveform, at -6dBFS.
Code:
-FS 0 0000 0000 0000 0000 (dac#1 and dac#2 get all zeros)
-FS+1LSB 0 0000 0000 0000 0001 (dac#2 gets the data left shifted)
-0.5FS-1 0 0111 1111 1111 1111
-0.5FS 0 1000 0000 0000 0000
BPZ-1LSB 0 1111 1111 1111 1111 (dac#2 is "filled")
BPZ 1 0000 0000 0000 0000 (dac#2 gets all ones and dac#1 gets the data+1LSB)
BPZ+1LSB 1 0000 0000 0000 0001 (dac#1 gets 0000 0000 0000 0010)
+0.5FS 1 0111 1111 1111 1111
+0.5FS+1 1 1000 0000 0000 0000
+FS-1LSB 1 1111 1111 1111 1110 (dac#1 gets 1111 1111 1111 1111)
+FS 1 1111 1111 1111 1111
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Around bipolar zero we will only see low weight bits switching. The speed of the switching is also an error source, and the low bits switch faster than the high weight ones because of lower intrinsic capacitance (tda1541 uses emitter scaling).
Again, the zero crossing is the critical region if we care how it will sound.
Thanks,
Alex
Again, the zero crossing is the critical region if we care how it will sound.
Thanks,
Alex
Code:
-FS 0 0000 0000 0000 0000 (dac#1 and dac#2 get all zeros)
-FS+1LSB 0 0000 0000 0000 0001 (dac#2 gets the data left shifted)
-0.5FS-1 0 0111 1111 1111 1111
-0.5FS 0 1000 0000 0000 0000
BPZ-1LSB 0 1111 1111 1111 1111 (dac#2 is "filled")
BPZ 1 0000 0000 0000 0000 (dac#2 gets all ones and dac#1 gets the data+1LSB)
BPZ+1LSB 1 0000 0000 0000 0001 (dac#1 gets 0000 0000 0000 0010)
+0.5FS 1 0111 1111 1111 1111
+0.5FS+1 1 1000 0000 0000 0000
+FS-1LSB 1 1111 1111 1111 1110 (dac#1 gets 1111 1111 1111 1111)
+FS 1 1111 1111 1111 1111
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Yep, I don't understand why this is so difficult to grasp for some?
The current surge for 1 bit flipping is far less than the current surge for 16 (or 17) bits flipping - approx 1:17 ratio difference
The ground bounce is similarly different & is a well known potential issue & can result in glitches at DAC outputs
cause there's bugger all down here on earth
There is simply no physical 17th bit in the digital domain i.e the dac. It is an equivalence that is a function the summed output current of the two dacs. You may have seen the relevant BB datasheets but it would seem you do not understand them. Or binary addition.
There is simply no physical 17th bit in the digital domain i.e the dac. It is an equivalence that is a function the summed output current of the two dacs. You may have seen the relevant BB datasheets but it would seem you do not understand them. Or binary addition.
