Go Back   Home > Forums > >
Home Forums Rules Articles diyAudio Store Blogs Gallery Wiki Register Donations FAQ Calendar Search Today's Posts Mark Forums Read

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

paging wm8804 users - TXSTATSRC/TXVAL_OVWR broken?
paging wm8804 users - TXSTATSRC/TXVAL_OVWR broken?
Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 7th February 2018, 08:37 AM   #1
usagi is offline usagi
diyAudio Member
 
usagi's Avatar
 
Join Date: Feb 2018
Default paging wm8804 users - TXSTATSRC/TXVAL_OVWR broken?

So i've been fighting this part for a couple weeks now.

I have an application where I need to clear the non-audio and validity bits in an SPDIF bitstream. I'm using the wm8804 in 3-wire i2c mode.

It was easy enough to get the wm8804 to passthrough SPDIF from RX0 to TX0 internally, I can passthrough SPDIF perfectly. I am successfully monitoring SPDIF stream parameters.

But TXSTATSRC and TXVAL_OVWR appear to be completely non functional. Nothing I do ever changes a single status bit. I have tried hundreds of combinations of settings. The bitstream is completely untouched.

cirrus have not responded to technical questions.

I am beginning to suspect TXSTATSRC / TXVAL_OVWR were never implemented, perhaps someone at wolfson got nervous at the idea of someone possibly using the wm8804 as an scms stripper and yanked the functionality completely.

Has anyone ever successfully used TXSTATSRC / TXVAL_OVWR to modify the channel status data of passthrough SPDIF on this part?
  Reply With Quote
Old 7th February 2018, 10:41 AM   #2
5th element is offline 5th element  United Kingdom
diyAudio Member
 
5th element's Avatar
 
Join Date: Oct 2002
Location: England
This may sound like a silly suggestion, compared to what it seems like you have already tried, but you have changed the status of the TXVAL_SF0/SF1 registers right?
__________________
What the hell are you screamin' for? Every five minutes there's a bomb or somethin'! I'm leavin! bzzzz! Now with website! www.5een.co.uk under construction.
  Reply With Quote
Old 7th February 2018, 10:46 AM   #3
usagi is offline usagi
diyAudio Member
 
usagi's Avatar
 
Join Date: Feb 2018
Quote:
Originally Posted by 5th element View Post
This may sound like a silly suggestion, compared to what it seems like you have already tried, but you have changed the status of the TXVAL_SF0/SF1 registers right?
well since the data sheet says TXVAL_OVWR uses the value of TXVAL_SF0 and TXVAL_SF1, I have of course changed them, to no effect whatsoever. They are completely ignored

and of course I have used SPDTX1 - 5 with TXSTATSRC as well.

do you have a wm8804 and have you successfully used this functionality?
  Reply With Quote
Old 11th February 2018, 03:42 PM   #4
nattawa is offline nattawa  Canada
diyAudio Member
 
Join Date: Apr 2010
Location: Mississauga, Ontario
According to the datasheet, when the TX is taking feed from the s/pdif receiver the validity bits recovered from the incoming s/pdif stream get forwarded to the transmitted s/pdif stream, regardless register values of TXVAL_OVWR, TXVAL_SF0, and TXVAL_SF1. What is required by your application could be done with a second WM8804 working as a s/pdif TX taking feed from the first wm8804 via the digital audio interface. Just a thought.
  Reply With Quote
Old 12th February 2018, 10:53 AM   #5
usagi is offline usagi
diyAudio Member
 
usagi's Avatar
 
Join Date: Feb 2018
wonder if I can route RX0 -> AIFTX -> AIFRX -> TX0 ?
  Reply With Quote
Old 12th February 2018, 08:28 PM   #6
nattawa is offline nattawa  Canada
diyAudio Member
 
Join Date: Apr 2010
Location: Mississauga, Ontario
Quote:
Originally Posted by usagi View Post
wonder if I can route RX0 -> AIFTX -> AIFRX -> TX0 ?
Smart one! Didn't think of that. However, there seems to be a problem with the master clock. When the s/pdif TX is taking feed from the AIF it anticipates a MCLK feed at the MCLK pin, that would require a clock signal of suitable frequency/phase (meaning associated with the incoming s/pdif stream) be sourced out of the WM8804 and be routed to the MCLK pin. The CLKOUT pin could be a souce of such clock signal but I have not gone far enough to make certain it will serve purpose.
Attached Images
File Type: png 8805CLK.png (56.5 KB, 14 views)
  Reply With Quote

Reply


paging wm8804 users - TXSTATSRC/TXVAL_OVWR broken?Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off

Forum Jump

Similar Threads
Thread Thread Starter Forum Replies Last Post
Broken lead in/braided cone wires broken... how to replace? hnash53 Full Range 3 12th March 2017 09:12 PM
Broken Kenwood 9600 Receiver and Broken Kef 107 Speakers DanApril1961 Multi-Way 1 11th July 2015 01:48 AM
Paging Unison845 korneluk Tubes / Valves 0 18th November 2006 12:18 PM
paging F. Moreno.... damianm Music 5 21st September 2006 03:04 PM
paging sreten.... Nanook Multi-Way 0 13th March 2004 07:02 PM


New To Site? Need Help?

All times are GMT. The time now is 11:05 AM.


Search Engine Optimisation provided by DragonByte SEO (Pro) - vBulletin Mods & Addons Copyright © 2018 DragonByte Technologies Ltd.
Resources saved on this page: MySQL 14.29%
vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2018 DragonByte Technologies Ltd.
Copyright ©1999-2018 diyAudio
Wiki