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Old 28th May 2004, 06:47 PM   #121
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I will do it some time but I am afraid it is the same thing as with the clock...
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Old 5th June 2004, 12:38 PM   #122
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none of all you old philips DAC fanatics did try this?


#90 circuit measures swing of ~1 to ~1,6 V on my scope

is this ok or should i change before building 6 of them?
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Old 16th June 2004, 12:38 AM   #123
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And it works with schemtaic shown in #90!

now for the discrete inverter for the - DAC
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Old 16th June 2004, 01:50 PM   #124
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Quote:
Originally posted by till
none of all you old philips DAC fanatics did try this?
Huh?
What?
Me?
My dacs have been quiet, I've been fiddling with phonostages and amps lately.

Bernhard has been fiddling with clocks.
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Old 16th June 2004, 01:57 PM   #125
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this is nothing with clocks, its preconditioning the digital input lines to the chips for minimal crosstalk and influence on the output.
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Old 16th June 2004, 02:02 PM   #126
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I know till, I've read this thread some months ago.
I was joking.
Bernhard has beed scavenging oscillators.
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Old 23rd June 2004, 10:32 AM   #127
ZERS is offline ZERS  France
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Quote:
Originally posted by till
And it works with schemtaic shown in #90!

now for the discrete inverter for the - DAC
Hi till,

did you built it or this is just a simulation ?

Did you built this one ?
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Old 23rd June 2004, 10:34 AM   #128
ZERS is offline ZERS  France
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Oups, I forgot the attachment
Attached Images
File Type: gif schemasec.gif (12.1 KB, 1572 views)
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Old 23rd June 2004, 04:54 PM   #129
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And how does it sound compared to standard cmos/TTL levels ????
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Old 23rd June 2004, 09:16 PM   #130
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i did not simulate it, some people who simulated posted allready. I built it.

I don´t want to give comments on sound now, because i feel i listened and compared not enough to tell something about yet.
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