DSD adc

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The PCM4202 and PCM4204

As mentioned above, the PCM4222 is a multiple bit, multilevel Delta sigma architecture, and as the documentation states, the 1-bit DSD signal is truncated from this multibit bitstream.

The older PCM4202 and PCM4204 ADC's are internally a single bit Delta sigma architecture and output a pure and mathematically unmanipulated DSD signal, making them more appropriate for a DSD converter. I highly recommend for starting with these earlier ADC's, as they are easily obtained, well documented, and can achieve high quality results if great care in execution is taken regarding PCB design and layout, clock circuits and paths, and power supply's.

I have successfully used a PCM4202 for this purpose and found satisfactory audible improvements over PCM sampling with the same converter. This allowed me to record at 128fs or 5.6mhz.

You could achieve a very small footprint if everything was custom designed, but a lot of testing to ensure proper operation of all support components and minimal interference would be required unless utmost care in layout is taken.

The purpose-specific audio software/hardware interface for inputting a raw DSD bitstream into a *nix box is yet to be seen, unless done using general purpose hardware ( I.e. digital oscilloscope device and software, way more support hardware and software then necessary.) There is no open source software/hardware solution to this problem that I am aware of.

The output of DSD is possible now using a number if different open source libraries, but the capture of DSD is not yet a standard process and not standardized in almost any way. (Ayre QB-9/NuAudio phono converter seem to both support some kind of reverse version of the DoP standard but for recording.)
 
That's great info on the pcm4202. I have also been curious about the non-native dsd stream of some newer adc's and what bearing it would have on the sound.

I have a lot of miniature power supplies already worked out here. Whether or not they are good enough or quiet enough to get into the digital world is another story. But I don't mind taking a stab at things and having it fail.

Shutterfly

do you have any thoughts on the ak557x series?

The summing mode is sort of tempting to get higher dynamic range, but then again anything over ~115db s/n seems fine for me as I'm not a low noise freak.

So it looks like the hardest part will be the coding and timing on the capture side of things. I'm curious about the recorder you built...
 
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It's a historical issue, IMHO. When digital recording started in 80's, you had no choice except PCM ADC, no available DSM ADC those days. But PCM ADC was not excellent compared with recent one. From 90's, You were able to use DSM ADC which were superior to PCM, then DSM became the standard ADC for many years.

But these days silicon industry has invented another high-performance PCM ADC called SAR which can operate more than 10MHz at 18bit resolution. Latest SAR is superior to DSM, especially in SNR. Now we have two selections SAR and DSM. It's subjective decision which you like and select.
 
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Some information about SAR, though a little bit off the thread. The latest SAR(AD7960) has almost same DR and SNR. DR is usually measured at -60dBFS and SNR at -1dBFS.
http://www.analog.com/media/en/technical-documentation/data-sheets/AD7960.pdf#search='ad7960'
Figure 12 at page10 shows SNR with 2500kHz bandwidth as 99.8dB. If you use this with 25kHz bandwidth, you can get 99.8+10log (100)=119.8dB.

I have the EV-board for AD9760. It has almost same value as the datasheet says. DSM ADC usually has noise increase at -1dBFS by 6dB. That's why both have almost same DR, but SAR has better SNR than DSM.
AFAIK, AD7768 is a candidate to compete with AD7960. AD7768 has 8 DSM ADCs which can operate together for better SNR and has less degradation at -1dBFS. But eight ADC drivers mean the disadvantage of PCB layout and clean power supply. My conclusion so far is that SAR is better than DSM if you want high SNR.
 
Some information about SAR, though a little bit off the thread. The latest SAR(AD7960) has almost same DR and SNR. DR is usually measured at -60dBFS and SNR at -1dBFS.
http://www.analog.com/media/en/technical-documentation/data-sheets/AD7960.pdf#search='ad7960'
Figure 12 at page10 shows SNR with 2500kHz bandwidth as 99.8dB. If you use this with 25kHz bandwidth, you can get 99.8+10log (100)=119.8dB.

Make sure you dither it sufficiently, it has only 18 bits.

Is there any indication on how Analog Devices achieved such good matching with a plain binary scaled capacitor DAC? I would expect at least a part of it to be thermometer coded, but they show a plain binary DAC in the datasheet. Then again, they call it a 'simplified' schematic.
 
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Thank you xx3stksm for the link. This might be a great way to archive vinyl. (I have a Tascam DA-3000 and would love to best it DIY style). Getting the popcorn as I hope this is a long thread.

My original purpose of designing ADC was also to archive my vinyl in digital format. The first version which used pcm4202 was three or four years ago. The second one with AD7982(1MHz sample) is my current version and used for archiving much vinyl. I'm sure the second one is enough performance for a music file.

But now I'm designing the third one to realize the best performance as possible for measurement purpose. Tha's why I use AD7960(5MHz sample) this time to achieve 120dB SNR and 120dB SFDR. The new version has almost fixed. I need to arrange environment to measure its performance. It takes some time.
 
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Make sure you dither it sufficiently, it has only 18 bits.

Bit resolution is an important factor in a digital system. But it's not an absolute concept which can't be overcome. A DSM DAC usually uses six bits but have more than actual 20bit resolution. An ADC also has the same technique as DSM does, oversampling.
http://www.ti.com/lit/an/slaa323/slaa323.pdf

Oversampling by four times can give you one additional resolution. If you use x64 oversampling((48kHz)*64=3.072MHz), AD9760 actually becomes 18+3=21 bit resolution. This is enough for more than 120dB SFDR. I don't need to include dither process. I implement simple decimation filter in a digital domain from 3.072MHz to 48kHz. It works well. But I have to fix precise oscillator with low phase noise to measure SFDR. My current oscillator is analog one which has a large amount of phase noise and can't be locked to an external clock. I need the oscillator which can be locked because coherent sampling is necessary.
 
It could be that the ADC already dithers itself sufficiently, but otherwise oversampling is not going to improve the noise floor for small, slowly varying signals.

As a simple example, imagine you have an ideal ADC and a signal that doesn't change at all. No matter how much you oversample, you then get the same conversion result over and over again and low pass filtering it isn't going to do any good.

Add a wideband noise signal to the ADC input and the conversion results will differ from each other and average out to the correct value.
 
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Oversampling can't improve SFDR or THD because they are "static" value which is independent of the averaging process. Oversampling can do improve SNR because it means noise shaping which can shift noise power within the target bandwidth to beyond the target.

I think high sampling rate ADC has a paradox. AD7960 has an 18-bit resolution which means almost 110dB SINAD(SINAD is both THD and SNR). But in 2500kHz bandwidth, It has only 99 dB SINAD. It ends up an almost 16-bit resolution in 2500kHz bandwidth. Bit resolution is dependant on the bandwidth. So, oversampling can make AD7960 free from the paradox.

Practically speaking, oversampling has the limitation. As far as I have measured so far, SINAD at -1dBFS(0dBFS=10Vpp) is 113dB in 20kHz bandwidth(SNR=118dB,THD=115dB). Captured data by ADC is in digital domain which means you can dither THD into white noise. I guess digital processing of the captured data decreases THD with the limitation not more than 113dB SINAD.
 
You need wideband noise at the ADC input or a noise shaping loop, otherwise oversampling won't do any good at all for small slowly varying input signals, not even with an ideal ADC. The ADC then simply produces the same sample many times in a row. The story about the 2500 kHz bandwidth assumes that the quantization noise is evenly spread from 0 up to the Nyquist frequency (Bennett's approximation for the spectrum of quantization noise). This is true with white dithering, it is approximately true with large input signals whose frequency has no rational relation with the sample rate, but it is completely wrong with a small narrowband input signal and no noise.
 
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