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Old 23rd December 2016, 12:26 AM   #11
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How many logic gates will be needed?

I predict they will use a lot of space, which is contrary to high frequency operation, and a lot of lag in the wires.

Last edited by alexandar888; 23rd December 2016 at 12:34 AM.
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Old 23rd December 2016, 01:06 AM   #12
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Quote:
Originally Posted by alexandar888 View Post
How many logic gates will be needed?

I predict they will use a lot of space, which is contrary to high frequency operation, and a lot of lag in the wires.
No one would build such a thing today with standard logic chips, such as the 74HC family for example. They would build it in an FPGA. As I recall, pre-designed S/PDIF reciever block FPGA intellectual property (IP) modules are available for license. If you are determined to design your own receiver from scratch you are in for a good deal of needless effort I should think. Perhaps, you are simply after the educational experience?
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Last edited by Ken Newton; 23rd December 2016 at 01:13 AM.
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Old 23rd December 2016, 02:32 AM   #13
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I am totally agree, but let's stay on topic. My main problem now is frequency / phase matching.

Also I'm thinking on the different formats. Will be universal or will only work for a strict sample rate.
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Old 23rd December 2016, 10:33 AM   #14
DF96 is offline DF96  England
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Quote:
Originally Posted by alexandar88
Will be universal or will only work for a strict sample rate.
That depends on how you design it. You are asking us questions like "how many logic gates?" which can only be answered once you have decided exactly what you are going to build and done part of the initial design (e.g. what PLL technique am I going to use? Do I want to cope with different data rates? Which logic family shall I use?).

You need to do a lot of reading on SPDIF format, jitter specification, PLL design, logic design etc. If you knew enough now to do the design you would not need to ask us these questions - in fact you would know more than most of us!
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Old 23rd December 2016, 11:19 AM   #15
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This is because I'm still not decided whether to follow the path already established or yet to discover the wheel. In fact, I already have working in the simulator circuit, as I said earlier - oversampling S/PDIF, completely eliminates the need for PLL, and the remainder of the pattern is child's play. But this option has too much jitter in my judgment, so look for ideas and hints on the front part and the use of PLL. If you know of useful links on the subject would be great.
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Old 23rd December 2016, 11:48 AM   #16
DF96 is offline DF96  England
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I guess in simulation you don't need a PLL because you know exactly what frequency will be used? Real life is not like that.
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Old 23rd December 2016, 01:16 PM   #17
Shinja is offline Shinja  Japan
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IIRC, TI's SpAct in DIR1703 and PCM2702 uses partially? freeze clock and numerical on-off like control system.
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Old 23rd December 2016, 01:35 PM   #18
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We know master clock on the receiver in any cases. Any phase / frequency shift in the input must not disturb the scheme work.

In my scheme the master clock is used to detect preamble. On the other hand, Ken Newton says that master clock are generated from preamble, that is what make me confused. And I was expected to discuss this more in deep - how to detect preamble / sample rate, of the line of using logic gates.
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Old 23rd December 2016, 02:51 PM   #19
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Quote:
Originally Posted by alexandar888 View Post
...In my scheme the master clock is used to detect preamble...And I was expected to discuss this more in deep - how to detect preamble / sample rate, of the line of using logic gates.
I suggest that you begin by reading Meitner's patent; 'Very Low Jitter Clock Rocovery...', #5,404,362, granted in 1995. The Patent is not a gate-by-gate circuit description, but it should help to orient you. A google search on the subject should turn up additional relevant information.

As for me, I can tell you that I have absolutely no interest in guiding anyone further in this. What you propose to do is not a trivial endeavor. If you are determined to reinvent a wheel invented decades ago it's your prerogative, but I will only give my best wishes for success.
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Old 23rd December 2016, 03:18 PM   #20
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I looked and I see some things in common with what I've done already. I will definitely read it, thanks a lot!

I hope I will find more enthusiasts here in DIY Audio.
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