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Old 5th September 2016, 02:04 AM   #1
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Default cs8412 and DF1704

Assuming the CS8412 is configured to M0=0, M1=0, M2=0, M3 = 0,
would the appropriate input mode for the DF1704 be I2S=0, IW1=1, IW0=1 (24 bit left justified)?
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Old 5th September 2016, 11:44 AM   #2
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Yes but you have to invert bitclock.
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Old 5th September 2016, 02:58 PM   #3
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What is the easiest way to do this? Is there a setting on the CS8412 or the DF1704 to take care of this?

It does not appear so from the datasheets.

Am I going to have to break the traces and implement a not gate, and if so, will any not gate suffice or must I take care to ensure I find one fast enough not to mess up the timing?

Last edited by belgiangenius; 5th September 2016 at 03:28 PM.
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Old 5th September 2016, 04:18 PM   #4
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HC logic should be fast enough. Alternatively, CS8412 format 2 - M3 = 0, M2 = 0, M1 = 1, M0 = 0 to DF1704 I2S = 1, IW1 = 0, IW0= 1 will work with no need for added logic.
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Old 5th September 2016, 06:21 PM   #5
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Thanks. I will check how easy it is to lift that M1 pin on the CS8412.
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Old 5th September 2016, 09:15 PM   #6
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M1 pin is very hard to separate from ground plane on circuit board.

Will try inverter on clock signal. Did some digging and found National DM74LS86N Quad 2Input Exclusive OR gate chip that I could use. LS logic type. Close to HC speed.

Anyone see any reason why this chip isn't appropriate? Looks okay to me so far...

Last edited by belgiangenius; 5th September 2016 at 09:23 PM.
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Old 6th September 2016, 02:41 AM   #7
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Thanks for your help, rfbrw.

I used the DM74LS86N and it works great. Chip is supposed to be good to 40Mhz or so, so I think it should be fine at the ~3Mhz SPDIF speed without causing any problems or compromising any timing quality.
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