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New FIFO buffer for RPI/SBCs

Well, I'm tented to write this. We'll see your comments...
I was wondering why this new DAC should have Rpi size ? Why is that ?
It can be any size, and the small Rpi board is connected somewhere. I read that this new DAC , due to it's complexity, should have multiple boards, with several connectors between. That is not better, and may be worse. Perhaps the pcb's design is somehow compromized in order to achieve such XXsmall size. Hope not.
Is this extra complexity (XXsmall size) creating problems and delaying final product, that we expet to be great ?
 
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Well, I'm tented to write this. We'll see your comments...
I was wondering why this new DAC should have Rpi size ? Why is that ?
It can be any size, and the small Rpi board is connected somewhere. I read that this new DAC , due to it's complexity, should have multiple boards, with several connectors between. That is not better, and may be worse. Perhaps the pcb's design is somehow compromized in order to achieve such XXsmall size. Hope not.
Is this extra complexity (XXsmall size) creating problems and delaying final product, that we expet to be great ?

The small size made the project a bit more difficult but not impossible. As far as connectors we took everything in consideration and chose the right connectors. PCB design was in no way compromised . Back to testing..