PCM1794 oversampling rate question

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How does PCM1794 is handling the oversampling rate of its Delta-Sigma modulator?
In PCM1792 (the counterpart of PCM1794 managed through microcontroller) the OSR must be selected by the user through the micro software. The same applies to WM8741 of Wolfson, the user must select the suitable OSR of Δ-Σ modulator according to the sampling rate of the incoming digital audio signal.
PCM1794 does not offer this possibility. Why? It has the ability to detect the sampling rate and to automatically select the proper OSR?
Thanks for any information.
 
You should know that i already have in use the pair of Wolfson WM8805 + WM8741 managed by a microcontroller.
As you probably know the DAC WM8741 has 3 oversampling rate settings, Low, Mid and High and according to each one a different set of filters is selected. From actual tests, if e.g. the Low OSR is selected and a higher rate digital signal (96KHz to 192KHz) is applied to WM8805 receiver, you could not hear nothing except noise. OTOH, if the High OSR is selected, any signal of any sampling rate can be converted without problem. But Wolfson suggests that the selected OSR should match with the sampling rate of incoming signal. For that reason, the microcontroller is informed from WM8805 for the sampling rate of it and accordingly selects the suitable OSR to WM8741 Δ-Σ modulator.
A similar process applies to PCM1792A. But not for the PCM1794. How on the earth this DAC could select the correct OSR? Or it is internally locked to a High OSR so as to be compatible with any signal of any sampling rate?
Do you think that PCM1794 has been developed for... NOS DACs?

P.S. My Asus Xonar Essence STX sound card is equipped with the PCM1794 and offers a great audio performance for any sampling rate. From actual audition tests it is directly comparable with WM8741.
 
Unlike the Antikythera device in your avatar, it seems like these modern devices do not include instructions with them.

It perhaps lowers the sampling rate with 96 kHz and then lowers it further with 192 kHz.

The PCM1792 and WM8741 can operate in the highest oversampling with 192 kHz?

The PCM1792 was released later than the PCM1794, perhaps it's an improvement?

I'm not sure if they can operate in zero oversampling, they are both a hybrid deaign and I'm pretty sure the 6-bit section can operate in non-oversampling, not the Sigma-Delta section since S-D in Nos is just a lot of noise I think.
 
Unlike the Antikythera device in your avatar, it seems like these modern devices do not include instructions with them.

It perhaps lowers the sampling rate with 96 kHz and then lowers it further with 192 kHz.

The PCM1792 and WM8741 can operate in the highest oversampling with 192 kHz?

The PCM1792 was released later than the PCM1794, perhaps it's an improvement?

I'm not sure if they can operate in zero oversampling, they are both a hybrid deaign and I'm pretty sure the 6-bit section can operate in non-oversampling, not the Sigma-Delta section since S-D in Nos is just a lot of noise I think.
Hi Kastor L, thanks for the reply.
I don't know what exactly takes place inside PCM1794, i did an assumption based on WM8741 working in hardware mode. Still in this case it allows the user to select the proper OSR through the use of a 3 position switch. WM8741 includes a set of extra "PCM Digital Filters" before the Σ - Δ modulator (the oversampling is applied to modulator). PCM1792a and PCM1794 don't include a simillar filter section. Additionally, the OSR of PCM1792a is accessible only trough microcontroller. WM8741 looks like more flexible.
For the High OSR, i can confirm you that WM8741 is working flawlessly with signals of 192KHz, i have checked it on actual hardware. I think the same applies to PCM1792a and PCM1794 although i still haven't tried those DACs.
In both WM8741 and PCM1792a you could bypass all internal filters. In WM8741 datasheet is refered as 8FS mode which also is accessible only through microcontroller (software operation mode). I quote from WM8741 datasheet:
When MODE8X is set, the PCM data input to the WM8741 is applied only to the digital volume control and then the analogue section of the DAC system, bypassing the digital filters.
A simillar process also applies to PCM1792a, it is refered as DFTH: Digital Filter Bypass (or Through Mode) Control and also states that: The word (WDCK) signal must be operated at 8× or 4× the desired sampling frequency
PCM1794 can also be configured in bypass mode through 4 pins (hardware mode).
This functionality is offered by the 3 DACs (Wolfson and TI) when a DSP is desirable as an external digital filter to perform the interpolation function.
 
I see, all noted.

Here is a service which changes 2x WM8740 to 2x WM8741, plus changes the digital filter setting from linear- to minimum-phase.

It's expensive and popular, have a look

Red Wine Audio Components

I looked again in redwineaudio modifications of their RWAK 120/S/B digital audio player. It says that they replace the two WM8740 with WM8741 and that configure them to work in hardware mode. They state that is better this, because WM8741 volume control is bypassed: We discovered that even with the volume set to MAX (setting 75), the output voltage of the WM8740 signal is still attenuated in the digital domain Hmm... that is curious, i haven't noticed something like this in my hardware.
Also that they use the “minimal phase digital filter”. But what from the 3 offered by WM8741? a) Minimum phase ‘soft-knee’ filter b) Minimum phase half-band filter c) Minimum phase apodising filter ???
Curious things... Why they don't make a firmware upgrade in microcontroller?
 
Hmm that is curious.

Firmware upgrade to microcontroller? So the user can change the settings?

Yes it's a great idea.

I'm not sure which filter of the three you write they use.
Yes, indeed is curious.
Look what is refered in WM8741 datasheet regarding filter selection:
There is a "tristate" input pin named "FSEL" which can be tied to Vcc = logic state 1, or to GND = logic state 0, or it can be left open = High Z state.
In hardware mode and according to OSR selected, the following filters will be selected by default:

1. For FSEL = 0 and OSR = Low Rate (32 to 48KHz)
Linear phase half-band filter for backward compatibility
For FSEL = 0 and OSR = Mid or High Rate (88.2 to 192KHz)
Linear phase half-band filter for backward compatibility

2. For FSEL = 1 and OSR = Low Rate (32 to 48KHz)
Minimum phase apodising filter
For FSEL = 1 and OSR = Mid or High Rate (88.2 to 192KHz)
Linear phase ‘brickwall’ filter

3. For FSEL = Hi Z and OSR = Low Rate (32 to 48KHz)
Linear phase apodising filter
For FSEL = Hi Z and OSR = Mid or High Rate (88.2 to 192KHz)
Minimum phase ‘soft-knee’ filter

redwineaudio says that the WM8741 is configured in hardware mode. So the FSEL pin should constantly be in 0 or 1 or Hi Z logic state.
redwineaudio also says that the "minimal phase" digital filter is allways selected.

According to the above table THAT IS IMPOSSIBLE!
If FSEL is tied to GND = 0, apparently we can't talk about "Minimal phase" filter.
If FSEL is tied to Vcc = 1, for Low OSR indeed the "Minimum phase apodising" filter will be selected , but for Mid - High OSR the "Linear phase brickwall filter will be selected.
Finally, if FSEL pin is left open = Hi Z, for Mid - High OSR indeed the "Minimum phase soft-knee" filter will be selected, but for Low OSR the "Linear phase apodising" filter will be selected.

Here, we have a contradiction in the description of redwineaudio.
 
I know very well what they do in redwineaudio for the advertised modification as i tried same things in my WM8741 DAC.
Actually, in commercial devices the use of WM8741 in software mode is a big messing for the end user as he pay some thousands just to hear music and not to make experiments. For this purpose you could buy the WM8741 evaluation board. For that reason, WM8741 is configured to work in hardware mode. But still in hardware mode, and if we talk for a consistent audio device, the OSR of Σ-Δ modulator of WM8741 must be changed within 3 levels according to the sampling rate of incoming digital signal for the selection of correct filters. There is a tristate input pin, named OSR, that is offered by WM8741 for this purpose. You have two choices for selection of correct OSR: a) to connect the OSR pin in a 3 position switch for manual selection and b) to use a microcontroller which gets the info of the sampling rate of incoming signal from the SPDIF receiver chip and accordingly changes the states of a pin connected to OSR input of WM8741 and: outputs a logic 1 for High OSR or 0 for Low OSR or is turned in input to present Hi-Z state in the OSR pin for Medium rate. At the same time, the FSEL tristate input of WM8741 must be changed through another pin of micro, if we like to allways use the Minimum or Linear Phase Apodising filter (which is the suitable filter for pre-ringing elimination) for any OSR. As you could understand, the use of a micro is NECESSARY for automated funcionality. It is not practical the use of manually operated switches for the end user.
But given that if the OSR pin is constantly tied to Vcc, to get a logic level 1, then the WM8741 Σ-Δ modulator is also constantly working in High OSR and can convert any signal of any sampling rate. But this is the dishonest solution as you couldn't never get the best possible audio performance.
 
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Rega DAC D/A processor Measurements | Stereophile.com

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The WM8741 has three kinds of minimum-phase filters, yet only the "apodizing" filter removes the pre-ringing?
Brickwall filters also reduce pre-ringing but not so effectively like apodizing ones. All these from what i've read so far. Very informative is the "Audio Engineering Society Convention Paper 6577: An ultra high performance DAC with controlled time domain response" by Paul Lesso & Anthony Magrath of Wolfson Microelectronics.
The design of filters requires trade-offs between pre or post ringing, group delay distortion, passband ripple, stopband attenuation etc. It is very complex issue. You should have a well targeted option to use a concrete filter. For example, in a recording studio where the lower latency is desirable it is prefferable the use of Minimum Phase filter as its pre-ringing is minimal in the cost of maximum post-ringing and increased group delay distortion.
As you could understand everything is based in compromises. Any filter has its plus and minus, no one is a panacea.
 
Thank you, nice summary.

A speaker system with speakers at different distances already has phase delay, like in a car, or the tweeter closer than the woofer, I don't personally think this is an issue for sound quality, just think of when you sit in a cinema, if you sit to the back or front, the phase delay is large, but the sound quality is the same.

Some may think it is an issue, it just depends on the application, the desire.

If I want to achieve the lowest latency in an application, I will use a digital-filter-less DAC.
 
As far as I am aware the 1794 uses 64x for all sampling frequencies given to it. This works just fine, as it works just fine in the 1792. What you can't do is run 128x with 192kHz in the 1792 and 32x doesn't give optimal results when using 48kHz. 64x works though with all.

One thing to bear in mind is that both the 92 and 94 automatically detect the sampling frequency and select the correct rate FIR interpolation filter. This is the crux, because if they didn't do this you would definitely need to manually address it like other DACs do, such as the wolfson.

TIs automatic interpolation filter really simplifies DAC design in multi sample rate products.
 
As far as I am aware the 1794 uses 64x for all sampling frequencies given to it. This works just fine, as it works just fine in the 1792. What you can't do is run 128x with 192kHz in the 1792 and 32x doesn't give optimal results when using 48kHz. 64x works though with all.

One thing to bear in mind is that both the 92 and 94 automatically detect the sampling frequency and select the correct rate FIR interpolation filter. This is the crux, because if they didn't do this you would definitely need to manually address it like other DACs do, such as the wolfson.

TIs automatic interpolation filter really simplifies DAC design in multi sample rate products.
Thanks for the information 5th element
I've read enough times the datasheet of 1794 and 1792, plus some app. notes of TI regarding ICOB decoder and 5 level Σ-Δ modulator. All are exactly as you describe. The signal firstly pass through an 8X oversampling filter and then "the upper 6 bits" are directed to the ICOB decoder while the MSB and lower 18bits are directed to the "3rd order 5 level Δ-Σ modulator". Here i still can't understand: 6 upper bits + MSB + 18 lower bits = 25 while the applied signal has a max width of 24bits. I know about the offset bit code, it is used in unipolar systems instead signed integers where the MSB expresses the sign. The ICOB decoder produces an inverted 6bit code from 0 - 62 (6b = 63d max). The Σ-Δ modulator produces a 4bit code (4b = 5d max) and as the original upper 6 bits are inverted, when are summed with the output of Σ-Δ we have 66d which is the level of the resulted digital code.
Does 1794 converts a max 24bit digital signal to an 8bit stream to feed the "advanced data weight average" section and then the "current segment DAC"?
 
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I have understund the same like you Kastor L.
When PCM1794 is modified in the filter bypass DFTH mode (digital filter through) simply the front end 8X Oversampling filter section is bypassed, then the signal is returned to Adcanced Segment DAC Modulator section in which is included a Σ-Δ modulator which operates at 64Fs oversampling rate by default.
In PCM1792 the user could select among 32, 64 or 128Fs (i.e. 128 times the Fs) oversampling rate for the modulator.
Given that the Σ-Δ modulator is never bypassed do you think that using either 1794 or 1792 you could obtain a true NOS DAC?
The other guy has built a more consistent NOS Converter as he does not make use of DAC chip at all. He simply gets the I2S bus lines and feeds a grid of Shift Registers + Latches which together a R2R grid can decode the digital signal to analog current.
 
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I have to say, I have no idea about how the internals of DACs actually work. I mean I get the basic concept, but down to the nitty gritty of the signal processing, I haven't yet learnt all of that.

Having said that, I thought that the OS rate set the base rate for how fast the output section of the DAC switches. It directly affects the required low pass corner frequency required to block out the noise generated within.

I think that the ideal way to use the PCM1792 would be to use 32x OS for 192, 64x OS for 96 and 128x OS for 48, that keeps the internal speed the same and keeps the requirements on the external low pass the same. Of course, there is no harm in using 64x OS for all sampling frequencies providing your filter is specified to filter out the noise when using the lowest sampling frequency.

If the frequency that the interpolation filter works at, changes with respect to the OS rate, then the TI DAC obviously auto selects that too.
 
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