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DAC Schematic Review and Layout Suggestions - WM8804 and PCM5102A
DAC Schematic Review and Layout Suggestions - WM8804 and PCM5102A
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Old 19th July 2014, 06:26 PM   #11
Ken Newton is offline Ken Newton  United States
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You should insert an small value A.C. coupling capacitor in series with the S/PDIF transformer T1's primary winding if the S/PDIF transmitter side is not already A.C. coupled. An cap. identical to C14 is probably okay, but a value closer to 10nF is probably preferred. This cap. is to block any D.C. current from flowing through the primary, which would otherwise greatly degrade the core inductance.

Last edited by Ken Newton; 19th July 2014 at 06:33 PM.
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Old 19th July 2014, 07:04 PM   #12
fotios is offline fotios  Greece
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Oh! I forgot to refer the lack of a POR (Power On Reset) circuit which i think is of major importance regarding all other suggestions as it ensures a safe initialization of all registers of WM8804 during power up. Hardly suggested! See the attached picture.
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Old 19th July 2014, 09:59 PM   #13
jean-paul is offline jean-paul  Netherlands
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Quote:
Originally Posted by Ken Newton View Post
You should insert an small value A.C. coupling capacitor in series with the S/PDIF transformer T1's primary winding if the S/PDIF transmitter side is not already A.C. coupled. An cap. identical to C14 is probably okay, but a value closer to 10nF is probably preferred. This cap. is to block any D.C. current from flowing through the primary, which would otherwise greatly degrade the core inductance.
Many sources have caps in series with their outputs or they have output transformers ...

BTW we experienced better results with somewhat larger caps for C14 (220 nF to 1 µF).
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Old 19th July 2014, 10:10 PM   #14
df audio is offline df audio  Canada
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Quote:
Originally Posted by fotios View Post
Oh! I forgot to refer the lack of a POR (Power On Reset) circuit which i think is of major importance regarding all other suggestions as it ensures a safe initialization of all registers of WM8804 during power up. Hardly suggested! See the attached picture.
Can you explain how it works?
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Old 20th July 2014, 01:09 AM   #15
df audio is offline df audio  Canada
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Ok, so here's my updated schematic. In fact, I've started on the layout and should be able to post it online soon.

After listening to your suggestions, I've made some changes:
  • Ferrite beads (this one) are added to the input
  • Cap (C24) added in series to the SPIDF input - it costs almost nothing and should do more harm than good
  • 22 ohm damping resistors added to the I2S lines (actually, I have no idea how to calculate the actual values since I don't have a scope and the datasheets don't say the input/output impedances)
  • Point for 5V input is added to the layout (not on the schematic though) so that I can use an external power supply if so desired...
The reset circuit looks interesting, maybe someone can explain why it's better than just connecting the RESET pin to the supply? For the suggestions regarding cap values and stuff, the best thing to do I think is to just order extras and switch them during testing to see which one sounds or measures the best.

Click the image to open in full size.
PDF avaliable here.

That's it! Layout coming soon, and remember that suggestions are always welcome.
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File Type: pdf Schematic 1.2.pdf (72.5 KB, 45 views)

Last edited by df audio; 20th July 2014 at 01:19 AM.
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Old 20th July 2014, 06:32 AM   #16
jean-paul is offline jean-paul  Netherlands
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Hi you will regret not having used CLC filtering to the supply pins of both chips. The device will be as good as its power supplies, don't skimp on parts in that area. "Low part count" is only a feature in the industry, you don't have to count pennies when DIYing as it will be more expensive than ready made anyway in 99% of cases. Both chips optimally should have their own separate voltage regulators. See our Subbu V3 for inspiration if you like. That one clearly shows the benefits of good decoupling, CLC filtering, separate regs and using beads all over IMHO. In fact I toyed with the idea to adjust our layout to PCM5102A (a 10 minute job) but the ES9023 is a slightly better chip with the external low jitter XO as a bonus so I did not pursue. Since I have the idea I am talking to myself I am out of here. Good luck with the design.

The way you made the reset circuit is OK.

BTW it is called SPDIF....
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Last edited by jean-paul; 20th July 2014 at 06:50 AM.
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Old 20th July 2014, 09:04 AM   #17
fotios is offline fotios  Greece
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Quote:
Originally Posted by df audio View Post
Can you explain how it works?
I quote the section of WM8804 datasheet where is explained what exactly happens during power on reset.
E.g. when the internal processor of WM8804 is powered up, if the pin "RESETB" is in Hi state, won't read the state of "SDIN" pin to decide in which mode will configure the chip before enabling it. So it could decide to select the "software mode operation" without loading all factory preset binary values for "hardware mode" to the 31 registers of device. The same applies if a momentary power failure occurs. Especially in this case, the diode helps discharge the 10uF capacitor quickly. Why 10uF and not 0.1uF as is suggested in datasheet? From... habit due to my previous experience with microcontrollers! A bigger capacitor ensures a longer time lag during reset and so a more secure initialization of chip registers while, at the same time, does not cause any side effect. It also offers more room for unimportant power supply level variations. In either case, 0.1uF or 10uF, both reset and initialization process are instantaneous. A luxury version of course, is the use of a power supply supervisor IC like the DS1818R10 which continuously monitors the power supply level and accordingly decides if there is need for a device reset.
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Last edited by fotios; 20th July 2014 at 09:11 AM.
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Old 20th July 2014, 10:08 AM   #18
fotios is offline fotios  Greece
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Quote:
Originally Posted by df audio View Post
[*]Ferrite beads (this one) are added to the input[*]
The ferrite bead i proposed you is of 1206 case style = 3216 metric (or 3.2 X 1.6mm) and i did it simply for its size, for your convenience during soldering. This one you selected is OK as for resistance but of 0805 case style = 2012 metric (or 2.0 X 1.2 mm) which is very small. These "little devils" are magnetized and their handling with metal tweezers is very enervating during soldering, believe me!
Quote:
22 ohm damping resistors added to the I2S lines (actually, I have no idea how to calculate the actual values since I don't have a scope and the datasheets don't say the input/output impedances)
In the thread i proposed you is clearly refered that the I2S bus lines impedance depends only in the shape, the width and the length of the physical tracks of PCB that connect the audio interface of spdif receiver with this of DAC. It does matter only in PCB layout drawing and for high sampling rate digital audio signals, i.e. 192Ks/s. For lower rates there is not any problem.
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Last edited by fotios; 20th July 2014 at 10:17 AM.
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Old 20th July 2014, 02:12 PM   #19
stormsonic is offline stormsonic  Slovenia
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Make R2 = 300R.
Add 100R resistor into primary side.
Remove C24.
Increase C9 value. It should be much bigger.

Last edited by stormsonic; 20th July 2014 at 02:15 PM.
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Old 20th July 2014, 07:37 PM   #20
df audio is offline df audio  Canada
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Quote:
Originally Posted by fotios View Post
The ferrite bead i proposed you is of 1206 case style = 3216 metric (or 3.2 X 1.6mm) and i did it simply for its size, for your convenience during soldering. This one you selected is OK as for resistance but of 0805 case style = 2012 metric (or 2.0 X 1.2 mm) which is very small. These "little devils" are magnetized and their handling with metal tweezers is very enervating during soldering, believe me!
I've soldered 0805 ferrites before and with my tweezers they're fine.

Quote:
Originally Posted by jean-paul View Post
Hi you will regret not having used CLC filtering to the supply pins of both chips. The device will be as good as its power supplies, don't skimp on parts in that area. "Low part count" is only a feature in the industry, you don't have to count pennies when DIYing as it will be more expensive than ready made anyway in 99% of cases. Both chips optimally should have their own separate voltage regulators. See our Subbu V3 for inspiration if you like. That one clearly shows the benefits of good decoupling, CLC filtering, separate regs and using beads all over IMHO. In fact I toyed with the idea to adjust our layout to PCM5102A (a 10 minute job) but the ES9023 is a slightly better chip with the external low jitter XO as a bonus so I did not pursue. Since I have the idea I am talking to myself I am out of here. Good luck with the design.
I'm looking at the Subbu design right now; it looks quite interesting. Maybe I'll make some changes...
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