To start with you need a source that can be synchronized to an external clock (this is normal on pro gear). What is your source?
OK, but that is asynchronous USB, so there is no need to synchronize the clocks. The clock synchronisation is an issue only for connection methods (such as S/PDIF) that don't have a flow control mechanism.
Julf,
If the master clock is the one of the main DAC : do we need to adapt the frequency clock with dividers to feed the emmiter spidf chip in the source side ? Let say with a RPI as well (it's just to understand, have 2 SB Duet, but don't want to break those device with my bad skill).
I have maybe please a more general question about the clock wires: which is the "worse" solution at same length of cables if we can put the two devices close enough together):
1- spidf feeding with buffers (and/or multiple serie chips or passive components in serie)
2- High jack the I2S from the source if possible ? Of course with a flat SgSgSgSG wire : S(ignal)/g(round) ?
My actual understanding is 1) is a good enough solution but 2) a better one as the clock has its own non shared line (but doesn't work if length is > at something like 5 cm) ?
If the master clock is the one of the main DAC : do we need to adapt the frequency clock with dividers to feed the emmiter spidf chip in the source side ? Let say with a RPI as well (it's just to understand, have 2 SB Duet, but don't want to break those device with my bad skill).
I have maybe please a more general question about the clock wires: which is the "worse" solution at same length of cables if we can put the two devices close enough together):
1- spidf feeding with buffers (and/or multiple serie chips or passive components in serie)
2- High jack the I2S from the source if possible ? Of course with a flat SgSgSgSG wire : S(ignal)/g(round) ?
My actual understanding is 1) is a good enough solution but 2) a better one as the clock has its own non shared line (but doesn't work if length is > at something like 5 cm) ?
I would definitely not start to fiddle with the spdif clock unless it was clearly shown that there is an issue with excessive jitter.
thank you,
Ok, my understanding with your answer is a spidf receiver can work with a large bench of frequencies.
It was as just more a theoric question as I'm planning to play with old miltibit dac chips. But have two SPIDF Sure electronics spidf W8804 receiver. Those devices are nice for fools like me : very versatil : you can switch off the hardware mode... But was very addict to the Ecdesign thread one year ago; the parts with the masterclock and buffers was a little hard to understand and I gave up...
Ok, my understanding with your answer is a spidf receiver can work with a large bench of frequencies.
It was as just more a theoric question as I'm planning to play with old miltibit dac chips. But have two SPIDF Sure electronics spidf W8804 receiver. Those devices are nice for fools like me : very versatil : you can switch off the hardware mode... But was very addict to the Ecdesign thread one year ago; the parts with the masterclock and buffers was a little hard to understand and I gave up...
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