I have two different NONOS pcm1704 DACs.
One is without reclocking and another is with reclocking.
All things being the same, only a Flip-FlopD and a XO was added for reclock LRCK, DATAL, DATAR and BCK signals.
The DAC without reclocking works fine.
The DAC with reclocking works with lots of nasty noise (digital noise I'd say)
After a huge research and testing for errors, I found that putting pin10 of pcm1704 to -VDD (-5V) noise was gone.
I have a 74xx175 Flip-Flop D and of course, I get Q outputs and no the inverted Q' outputs ...
This thing puzzles me
One is without reclocking and another is with reclocking.
All things being the same, only a Flip-FlopD and a XO was added for reclock LRCK, DATAL, DATAR and BCK signals.
The DAC without reclocking works fine.
The DAC with reclocking works with lots of nasty noise (digital noise I'd say)
After a huge research and testing for errors, I found that putting pin10 of pcm1704 to -VDD (-5V) noise was gone.
I have a 74xx175 Flip-Flop D and of course, I get Q outputs and no the inverted Q' outputs ...
This thing puzzles me
Hi LuisMCP,
did you fix this reclock problem? I have tried the same way and also got this noise when i try to reclock...
efreak0314
did you fix this reclock problem? I have tried the same way and also got this noise when i try to reclock...
efreak0314
I have two different NONOS pcm1704 DACs.
One is without reclocking and another is with reclocking.
All things being the same, only a Flip-FlopD and a XO was added for reclock LRCK, DATAL, DATAR and BCK signals.
The DAC without reclocking works fine.
The DAC with reclocking works with lots of nasty noise (digital noise I'd say)
After a huge research and testing for errors, I found that putting pin10 of pcm1704 to -VDD (-5V) noise was gone.
I have a 74xx175 Flip-Flop D and of course, I get Q outputs and no the inverted Q' outputs ...
This thing puzzles me
@efreak0314 & LuisMCP:
I have a modified DDDAC where I use an Acko reclocking board together with my own XO board (almost the same as Acko's XO board but without the output buffer; 45 & 49 MHz NZ2520SD XOs) and the combo384 USB to I2S. When I use this setup at 44.1 kHz to 192 kHz everything works fine, however, at 384 kHz the music is barely perceptible beneath a lot of digital noise.
I have not tried to measure on this setup yet but my guess would be that the LRCK coming from the combo384 timing-wise is very close to the clocks coming from the NZ2520SDs so that when the flip-flop reclocks it doesn't always clock on the time-wise same pulse from the combo384. Thus, from time to time an LRCK - or other - clock pulse is lost. It might be solved by using an 90xxx MHz clock but that most likely would introduce a less good phase noise spec.
Why LuisMCP was able to solve it by connecting pin 10 to - VDD is a puzzle though ??
Good luck in solving it ;-)
Jesper
I have a modified DDDAC where I use an Acko reclocking board together with my own XO board (almost the same as Acko's XO board but without the output buffer; 45 & 49 MHz NZ2520SD XOs) and the combo384 USB to I2S. When I use this setup at 44.1 kHz to 192 kHz everything works fine, however, at 384 kHz the music is barely perceptible beneath a lot of digital noise.
I have not tried to measure on this setup yet but my guess would be that the LRCK coming from the combo384 timing-wise is very close to the clocks coming from the NZ2520SDs so that when the flip-flop reclocks it doesn't always clock on the time-wise same pulse from the combo384. Thus, from time to time an LRCK - or other - clock pulse is lost. It might be solved by using an 90xxx MHz clock but that most likely would introduce a less good phase noise spec.
Why LuisMCP was able to solve it by connecting pin 10 to - VDD is a puzzle though ??
Good luck in solving it ;-)
Jesper
I can't remember clearly, but I believe the problem was in family chips used for glue logic. Pick the fastest chips you can get for the logic gates and/or shift registers.
good luck!
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