Multiple parrallel PCM1704 per channel

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What if we use Multiple parrallel PCM1704 chips per channel?

No balanced operation but let's say 4 parallel chips for each channel to get high enough current for a 37-40 ohm I/V resistor (I have read on the forums that PCM1704 performs best with 10 ohm or lower resister). This way we’ll get peak to peak voltage 192mV (1.2ma x 4 PCM1704 x 40 ohm I/V), which then can be further amplified to 2v via output stage.

I am a beginner and wants to build a PCM1704 based dac without using active I/V.

One issue will be the cost. But has anyone done that? Any thoughts and suggestions?
 
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Four PCM1704's into a 40ohm is functionally equivalent to a single 1704 into 160ohms. You will still be getting a bit close to clipping threshold of internal protection diodes, but should be ok. The sonic advantage of multiples into passive i/v are theoretical, and I have not yet proven to my own satisfaction that they are audible with the 1704, but will be testing this fairly soon.
 
Do you really need 24bits? I ask this because over here the PCM1702 is considerably cheaper. Perhaps because its not 'top of the range'. I recommend post-filtering using passive (LC) filters after the I/V resistor - I have some filter designs on my blog. Paralleling gets you more output current for sure but as stephensank points out you"re limited on this dac by the on-chip protection diodes so more current doesn't in practice buy you more voltage. The theoretical benefits of improved THD due to reduced bit weight errors are very unlikely to be audible - being of R2R architecture this chip's SQ is limited by glitching.
 
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Four PCM1704's into a 40ohm is functionally equivalent to a single 1704 into 160ohms. You will still be getting a bit close to clipping threshold of internal protection diodes, but should be ok. The sonic advantage of multiples into passive i/v are theoretical, and I have not yet proven to my own satisfaction that they are audible with the 1704, but will be testing this fairly soon.

Hi stephensank:

Thanks for the reply. I am here to learn and thus have not hesitance to say that I don't understand that why each PCM1704 would see 160 ohms instead of 10 ohms. I must be missing something really basic here :scratch1:

I understand your point about internal protection diodes but on the other hand I am interested in knowing if some body has really tried this scenario in practice.
 
Do you really need 24bits? I ask this because over here the PCM1702 is considerably cheaper. Perhaps because its not 'top of the range'. I recommend post-filtering using passive (LC) filters after the I/V resistor - I have some filter designs on my blog. Paralleling gets you more output current for sure but as stephensank points out you"re limited on this dac by the on-chip protection diodes so more current doesn't in practice buy you more voltage. The theoretical benefits of improved THD due to reduced bit weight errors are very unlikely to be audible - being of R2R architecture this chip's SQ is limited by glitching.

Hi abraxalito:

Yes you are right about PCM1702 and I am sure my DIY build will have lesser than 16 bits due to implementation and noise floor.

I am interested in knowing is someone has already walked this path and what were the results.

What is your hard experimented advice?
 
Hi,

Had evaluated a 8pcs 1704 board some years go. A other board with just a single 1794 sounded a tad better to us, a tiny bit smoother. Admittedly it was evaluted on a extremly capable speaker system. On a more 'common' speaker system no audible difference occured. The surroundings of the DAC chips, especially the digital filtering, layout and analog I/V and Buffer stages were alot more decisive for the sonic outcome.
Try for example linear upsampling and discrete analog stages.
The DAC core itself doesn't seem to play a big role nowadays.

jauu
Clvin
 
if the Iout V compliance range is the limit, 10 Ohms @ 1.2 mA means 12 mVrms was the reported "sweet spot" (not agreeing just running with the number)

to keep the same V with 4x converters paralleled they would have to work into 2.5 Ohm - a bit daunting for the amplifier noise design
a step up transformer would be the only real hope of getting anywhere near the possible S/N

other opportunities with multiple DAC include using DSP in front to create "subtractive dither" and offsets that sum to zero over all 4 DACs but runs each heavily dithered by many lsb to spread ladder nonlinearities
and each DAC clock could be phase offset in a OS interpolator to prevent glitch edges from adding together for possible 4x peaks

yet another way to "combine" DAC outputs would be to use each in a DSP active XO so each DAC only sees, only drives a restricted frequency range which should reduce IMD, reduce the level any out of band distortions are sent into the room by the respective limited driver bandwidth
 
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I am interested in knowing is someone has already walked this path and what were the results.

What is your hard experimented advice?

Based on my experience of walking the DAC path fairly intensely for the past three years I'd offer the following advice :

1) As the bulk of the digitally recorded music in existence is 16/44k1 its not worth bothering with more bits or higher sample rates. Hi-res is rather unlikely to sound better than well implemented RB.

2) R2R ladder chips are amongst the poorest sounding of the multibits. If the highest SQ is your aim, avoid these and go for switched current source designs. Bipolar process designs tend to sound better than CMOS due to lower glitchiness.

3) I have yet to find an approach to the analog stage that's superior to passive LC filtering. Once you have fairly steep band-limiting in place there's nothing to be gained by oversampling except improved FR flatness and going even 2X OS will limit your dynamics due to the increased proportion of the time spent settling and doubling of the number of glitches.

4) FR flatness in NOS can be fixed up with analog post-processing or alternatively with my 'LAID' approach of multiple time-delayed DACs implementing an analog FIR filter.
 
This way we’ll get peak to peak voltage 192mV (1.2ma x 4 PCM1704 x 40 ohm I/V), which then can be further amplified to 2v via output stage.
Rethink your calculations. The PCM1704 output is specified as +/- 1.2 mA. That’s 2.4 mA peak-to-peak. Also, you should use a RMS measure when calculating the expected output voltage from any given I/V.

In the old days, paralleling DAC chips with linear interpolation was used to increase the sample rate. The practice is still used in a few commercial DACs like the Trinity DAC with 16 PCM1704.

Reducing the size of the I/V resistor has little effect on sound quality until you get to single digit ohms. There’s a reason op-amps, with their virtual ground inputs, are preferred by most designers.

Contrary to Abraxalito’s claims, high res beats red book every time. High sample rates win because they eliminated the need for a brickwall anti-image filter. 24-bits win with improved S/N. With redbook, the sample width of the true audio signal is 14-bits. Every digital sample carries ½ LSB of quantization noise to which is added two LSB of random noise (dither). That noise is embedded in every sample. Resamping redbook will yield a wider sample but the additional bits are noise. The true audio signal is still limited to 14 MSB.

2X OS will limit your dynamics due to the increased proportion of the time spent settling and doubling of the number of glitches.
Settling time is proportional the step size. Doubling the sample rate effectively halves the step size. The total time spent settling a few big steps is not much different than settling many little steps. I’m not sure what you mean by glitches; zero-crossing glitches or something else. If the former, the PCM1704’s complementary sign-magnitude converters pretty much eliminates zero-crossing glitches. Besides, what does sample rate have to do with it?

I analyzed a 176.4/24 recording I made, collecting the maximum and RMS step size, the number of zero crossings as a fraction of the total samples, and the RMS number of bits changing from one sample to the next. I then down-sampled the track to 44.1/24 and repeated the analysis. As expected, the RMS step size increased by a factor of four and, likewise, the fraction of zero-crossings. The number of bit-changes also increased but not by a dramatic amount.
 
Hi,

Had evaluated a 8pcs 1704 board some years go. A other board with just a single 1794 sounded a tad better to us, a tiny bit smoother. Admittedly it was evaluted on a extremly capable speaker system. On a more 'common' speaker system no audible difference occured. The surroundings of the DAC chips, especially the digital filtering, layout and analog I/V and Buffer stages were alot more decisive for the sonic outcome.
Try for example linear upsampling and discrete analog stages.
The DAC core itself doesn't seem to play a big role nowadays.

jauu
Clvin

Hi Calvin:

Thanks for the input. It is nice to hear that you did walk the walk and did not just loose heart by arguments alone.

8pcs 1704 board that you evaluated was using chips in pure parallel or parallel differential scheme?

I buy the discrete analog stages argument, however, the best digital playback that I ever heard, AMR CD-77, used passive I/V and was filter less. But then I don't have a vast experience and exposure to so many different players out there.
 
Settling time is proportional the step size.

Cite?

Doubling the sample rate effectively halves the step size.
True.

The total time spent settling a few big steps is not much different than settling many little steps.
Yet if your first claim were accurate it would be identical no, rather than 'not much different'?

I’m not sure what you mean by glitches; zero-crossing glitches or something else.
Glitches occur at every change of code in a DAC. With a traditional R2R ladder they just happen to be greatest at the zero crossing where the MSB switches.

If the former, the PCM1704’s complementary sign-magnitude converters pretty much eliminates zero-crossing glitches.
Indeed so - they moved them elsewhere i.e. they no longer occur at the zero crossing point, they didn't eliminate them.
 
if the Iout V compliance range is the limit, 10 Ohms @ 1.2 mA means 12 mVrms was the reported "sweet spot" (not agreeing just running with the number)

to keep the same V with 4x converters paralleled they would have to work into 2.5 Ohm - a bit daunting for the amplifier noise design
a step up transformer would be the only real hope of getting anywhere near the possible S/N

other opportunities with multiple DAC include using DSP in front to create "subtractive dither" and offsets that sum to zero over all 4 DACs but runs each heavily dithered by many lsb to spread ladder nonlinearities
and each DAC clock could be phase offset in a OS interpolator to prevent glitch edges from adding together for possible 4x peaks

yet another way to "combine" DAC outputs would be to use each in a DSP active XO so each DAC only sees, only drives a restricted frequency range which should reduce IMD, reduce the level any out of band distortions are sent into the room by the respective limited driver bandwidth

Hi jcx:

Thanks for the suggestions. You have raised real issues regarding S/N. Nice information on various implementations but DSP things are totally out of my league.
 
try Patrick Sen and you will forget about passive

would you please show us your 1704 projects
I am very Interested at balanced 1704 digital to analogue convertor

Hi samoloko:

I was planning to go with SEN but thought I should thoroughly check again if I can find passive solution by brute force (using more chips).

I am in planning stage and don't have any thing materialized to show you. Unfortunately, I am not looking for balanced approach for my DIY DAC.
 
Based on my experience of walking the DAC path fairly intensely for the past three years I'd offer the following advice :

1) As the bulk of the digitally recorded music in existence is 16/44k1 its not worth bothering with more bits or higher sample rates. Hi-res is rather unlikely to sound better than well implemented RB.

2) R2R ladder chips are amongst the poorest sounding of the multibits. If the highest SQ is your aim, avoid these and go for switched current source designs. Bipolar process designs tend to sound better than CMOS due to lower glitchiness.

3) I have yet to find an approach to the analog stage that's superior to passive LC filtering. Once you have fairly steep band-limiting in place there's nothing to be gained by oversampling except improved FR flatness and going even 2X OS will limit your dynamics due to the increased proportion of the time spent settling and doubling of the number of glitches.

4) FR flatness in NOS can be fixed up with analog post-processing or alternatively with my 'LAID' approach of multiple time-delayed DACs implementing an analog FIR filter.

abraxalito! Thank you so much for sharing your experiences and believes. I don't hear HF drop due to NOS in my current system. I suspect my loudspeakers' tweeters are not flat.
 
NOS droop is interesting - when I first listened to NOS I didn't care about the missing HF. As you say its not very noticeable. Yet when I corrected for it (I've tried a few methods, not all I've liked) I do prefer the corrected sound - a little bit more 'air' or 'sparkle' at the top.

Nobody's loudspeakers are flat - in the sense that your average electronics is flat (like better than 0.1dB). When I first started designing anti-imaging filters I agonized over their flatness but seems subjectively that's less of an issue than I previously thought - probably for the reasons you state - that speakers never get close to any kind of 'flatness'. Doubly so in rooms (as opposed to anechoic measurement chambers).
 
Rethink your calculations. The PCM1704 output is specified as +/- 1.2 mA. That’s 2.4 mA peak-to-peak. Also, you should use a RMS measure when calculating the expected output voltage from any given I/V


Thanks Tam Lin. I did overlook +-1.2 mA and learned about RMS.



In the old days, paralleling DAC chips with linear interpolation was used to increase the sample rate. The practice is still used in a few commercial DACs like the Trinity DAC with 16 PCM1704.


I google and read about Trinity DAC and it seems to use 32 PCM1704; 16 for each channel. It has price tag of EU 40,000 :crazy:.

Now the big question....Has any DIYer done that? What were the results? Is there any board/help available so I can also do it?
 
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