Multiple DAC clocks in DSP based active system - diyAudio
Go Back   Home > Forums > Source & Line > Digital Line Level

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 13th January 2013, 06:39 AM   #1
diyAudio Member
 
Join Date: Jun 2011
Location: Sydney
Default Multiple DAC clocks in DSP based active system

Hello,

I posted this in a DAC product based thread but thought I'd open it up to a broader audience.

What is the effect of having multiple DAC clocks in a DSP based active speaker set-up?

I am contemplating using a mini DSP to feed 3 x DAC PCB's.

Will freewheeling clock sources cause effective phase shift across the DAC outputs?
  Reply With Quote
Old 13th January 2013, 11:23 AM   #2
diyAudio Member
 
Join Date: Jun 2009
If the DACs' MCLKs aren't locked to the I2S SCK the result's typically undefined. The exceptions are the clock domain translation provided by the ASRC in ESS parts or DACs with integrated PLLs. (It's also possible the sample and hold block in the AD1955 may offer similar flexibility with somewhat lower accuracy but the datasheet rather implies otherwise. Some Cirrus parts do support arbitrary phase between MCLK and SCK but those do still require the usual integer MCLK to SCK ratio.)

Generally the best I'd expect would be silence with noise being more likely.

Last edited by twest820; 13th January 2013 at 11:30 AM.
  Reply With Quote
Old 13th January 2013, 12:12 PM   #3
TNT is offline TNT  Sweden
diyAudio Member
 
TNT's Avatar
 
Join Date: Apr 2003
Location: Sweden
I cant for my life understand why a number of DACs, in a multichannel XOver, need to be fed the same clock. The time difference induced by the signal manipulation (IIR,FIR) would be far greater than an eventual phase or frequency difference between clocks to the DACs?

So, maybe if you run all channels without any signal manipulation (whats the reason?), yes it could have an impact but when you insert your first filter or *delay* 8-o , this does not matter any more. Thats my view on this.

twest820 seem to answer on something else or maybe it was me not understanding the Q.

/

edit: my reasoning is based on that (really) good clocks are used.

Last edited by TNT; 13th January 2013 at 12:15 PM.
  Reply With Quote
Old 13th January 2013, 03:23 PM   #4
diyAudio Member
 
Join Date: Jun 2009
The most accurate crystals and oscillators readily available for audio clocks have an initial accuracy of 10ppm and a 10ppm aging tolerance. It's more likely 25 or 50ppm parts are used but let us assume the miniDSP and the DACs are all new and using 10ppm parts. This means the DSP clock and any given DAC clock will be within 20ppm of each other, which is a mismatch of 0.9 samples per second in redbook audio. So, if the DAC clock is running faster than the DSP is sourcing data it would have to make up a sample every 1.25 seconds. If the DAC is running slower, it would have to drop as sample.

This sample stuffing and dropping is basically what an ASRC does. PLLs solve the issue by locking an oscilator to the incoming clock frequency so that if the source is running at, say, 11.2897129MHz instead of the nominal 11.2896MHz 256Fs clock for redbook audio, the DAC runs 1.129Hz faster to match. If neither solution for crossing between the two clock domains is in place then somewhere inside the DAC the samples that are clocked into the DAC by the I2S SCK is clocked out by an MCLK running at a different rate. What specifically happens depends on how the registers are read and written. If you're lucky the worst that occurs is samples being lost or read twice but it's rather more likely bits will be garbled or parts of two samples will be combined into a new, incorrect sample.

Once data corruption occurs any phase behavior is irrelevant as there's no longer any signal to measure the phase of. In our example above it would take 90 milliseconds for two clocks to differ by one bit so, even if the clocks happened to start in the same phase (they won't) they'd be out of sync by the time the SigmaDSP part in the miniDSP has booted up and started sending data. If other problems with unmanaged clock domain translations such as latch up manage not occur then it's likely the DACs would play back corrupt data from the first sample to the last. Though, sure, there might be a couple correct samples in there.

Last edited by twest820; 13th January 2013 at 03:32 PM.
  Reply With Quote
Old 13th January 2013, 03:52 PM   #5
diyAudio Member
 
Join Date: Jan 2008
Loopback IR using separate soundcards for output and input show significant artifacts do to relatively small clock rate mismatch. I haven't investigated audibility threshold, preferring to avoid this by design.
  Reply With Quote
Old 14th January 2013, 03:18 AM   #6
diyAudio Member
 
Join Date: Jun 2011
Location: Sydney
Thanks for the informed responses! Seems I have been too obsessed with the analogue side of this project and have not paid the digital side enough respect!

I will study the chip set clocking diagrams to see if they make any sense to me but I'm thinking there may well be phase anomalies but they would equate to the driver voice coils being offset by a few mm's i.e its an issue but a small one.

As far as filter delays go... the mini DSP allows for tweaking of this but the DAC clocking issue is random and cannot be compensated for.

Interested any further comments as well please
  Reply With Quote
Old 14th January 2013, 04:31 AM   #7
TNT is offline TNT  Sweden
diyAudio Member
 
TNT's Avatar
 
Join Date: Apr 2003
Location: Sweden
Quote:
Originally Posted by triplej View Post
... there may well be phase anomalies but they would equate to the driver voice coils being offset by a few mm's i.e its an issue but a small one.
You hit the nail. Get good clocks. What do You prefer (in, say a 2-way system):

- LF stable, HF phase wanders.
- LF phase wanders, HF stable.
- Both LF and HF wanders.
- LF and HF stable, no relative wander (due to clocks)

....

Then the few mm can be fixed with delay function in XO.

Whats kind of output do the XO use? s/pdif... if yes; all DACs are synchronized via a PLL in the DACs to the XO and You are left with a jitter issue (maybe) and not with one of constant relative wonder between DACs. The deviation between the DACs will be up to the DAC PLL (assuming s/pdif) so they may drift apart but not constantly - they are pulled back by via the PLL to follow the XO.

Get good clocks (I'm not sure minidsp is top notch here)


/
  Reply With Quote
Old 14th January 2013, 05:26 AM   #8
diyAudio Member
 
Join Date: Jun 2009
If miniDSP documents their expansion header's pinout I've not found it, but presumably triplej is planning to tap the I2S lines on whatever one they have (2x4, 2x8, 8x8, ...) to drive triamped speakers. As the TAS5704 the miniAMP is built around has an MCLK input there's presumably an MCLK output from the miniDSP on the header. If so, this just needs to be fanned out to the DACs (if they're not ESS parts). Nothing random or uncompensatable about it; the clock distribution market is large, with a wide range of solutions at different price and performance points. Nominally it's just a matter of choosing one appropriate to the requirements, though I suspect a learning curve will be involved in this case.
  Reply With Quote
Old 14th January 2013, 05:53 AM   #9
diyAudio Member
 
Join Date: Feb 2009
Location: Brisbane, Australia
twest820 Minidsp 2x4 i2s details: http://www.minidsp.com/images/docume...0note%20v2.pdf

I am not sure on the equiv document for the 2x8 or 8x8 since I've never gone looking.
  Reply With Quote
Old 14th January 2013, 09:25 AM   #10
diyAudio Member
 
Join Date: Jun 2011
Location: Sydney
Sorry should have specified.... I have the nano-digi which has 8x SPDIF outputs ( 4x stereo).

The DAC I'm looking at uses a TCXO clock and a cs4398 DAC. (the Hifidiyme direct out one)
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
3 way active speaker system + Subwoofer based on Lm 3886 & 4780 kuldeep Chip Amps 13 19th April 2012 09:33 PM
Relationship between master clocks, system clocks, and audio freqs Garbz Digital Source 10 14th March 2006 02:02 PM
The digital system - On clocks, x-ports, S/PDIF, DAC's, etc PBeyer Digital Source 32 2nd October 2005 08:41 AM
Difference between transport and DAC clocks? Bas Horneman Digital Source 2 13th May 2005 04:06 PM
Looking for an active I/V stage for TDA1543-based DAC IpsilonSound Digital Source 21 17th June 2004 08:34 PM


New To Site? Need Help?

All times are GMT. The time now is 06:51 PM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright ©1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2