DQ DAC 2, BIII SE, Tube-I-Zator, Arduino, Amanero Build

[DQ828]

Well I think this is it, if you see anything obviously wrong I would love to hear from you.

I was wondering about the grounding, at this stage the only things connected to the Earth point are the Earth AC Input & the Shield from the larger trannie, should anything else go back to the earth point?

I haven't finished the wiring for Acko's isolator reclocker as I'm not sure how it's wired.

I think everything else is done.

The PDF is much better quality

[DQ828]

I want to dim the LED backlight to the screen I will be using, in the past I used the Arduino PWM output with a resistor in series to dim the backlight.

The manufacturer says I should ideally be using a transistor to do this & was kind enough to send me a mud map of how to go about it.

In the drawing below I have shown what I think I should do to make this work but I am not sure I have got it right.

The theory is that the LED backlight is supplied via the Drain & the Collector is supplied by the Arduino 3.3v output.

The gate voltage is dropped from 5v to 2.1v by the voltage divider and the gate voltage is pulsed using the PWM function to turn the transistor on and off, the frequency of the PWM is changed to dim the LED.

Can anyone confirm I have this right

[Crom]

Hi DQ828,

I've been following your build with interest and been trying to work out what components you are using to provide the 12v trigger out. I'd like to get my power amp to switch based on the DAC/pre I'm building. I can see that you've got a 12v feed from the transformer but what happens after that?

Thanks for any help,
Crom

[glt]

Originally Posted by DQ828

I want to dim the LED backlight to the screen I will be using, in the past I used the Arduino PWM output with a resistor in series to dim the backlight.

The manufacturer says I should ideally be using a transistor to do this & was kind enough to send me a mud map of how to go about it.

In the drawing below I have shown what I think I should do to make this work but I am not sure I have got it right.

The theory is that the LED backlight is supplied via the Drain & the Collector is supplied by the Arduino 3.3v output.

The gate voltage is dropped from 5v to 2.1v by the voltage divider and the gate voltage is pulsed using the PWM function to turn the transistor on and off, the frequency of the PWM is changed to dim the LED.

Can anyone confirm I have this right

Looks OK

[BrianDonegan]

Originally Posted by qusp

yes, unless you are actually using the amanero clock for clocking the BIIISE the reclocking mod is totally superfluous. the BIIISE already uses its onboard clock to not only control the dac, I believe it has some flipflops that reclock the incoming bck/lrck/sdata now. you can see them directly after the i2s inputs IC5.ICx, ICx on D2, D1, DCK.

There are no re-clocking flip-flops on the Buffalo. When using the onboard 100MHz XO (asynch), re-clocking the input clocks is a bad idea. It basically makes it impossible for the internal jitter elimination to function properly.

Those chips are analog switches for controlling the input selection (I2S/DSD or S/PDIF).

[deanoUK]

Hi Brian,

From the BIIISE highlights on the website :-
"High-precision, ultra-low-phase noise clock and integrated reclocking".

There is some confusion in a number of threads here on DIYAUDIO leading to the incorrect assumption that the analoge switch chips are Flip Flops

I appreciate you can connect and external clock but what does "integrated reclocking" mean exactly ?
.

[BrianDonegan]

Originally Posted by deanoUK

Hi Brian,

From the BIIISE highlights on the website :-
"High-precision, ultra-low-phase noise clock and integrated reclocking".

There is some confusion in a number of threads here on DIYAUDIO leading to the incorrect assumption that the analoge switch chips are Flip Flops

I appreciate you can connect and external clock but what does "integrated reclocking" mean exactly ?
.

It is one of the features (patented) of the ES9018 chip.

RMAF11: Digital Jitter and Volume Controls, Martin Mallison, CTO, ESS Technology - YouTube

Fast forward to 16:00.

[deanoUK]

Originally Posted by BrianDonegan

It is one of the features (patented) of the ES9018 chip.

RMAF11: Digital Jitter and Volume Controls, Martin Mallison, CTO, ESS Technology - YouTube

Fast forward to 16:00.

Thanks Brian.
Wish I had seen this video a while back.
So the 9018 data sheet shows a DPLL that does not exist ! (and a set of DPLL registers that do exit)
The "DPLL" is more like an advanced ASRC.
I always wondered by MCLK was not a multiple of FS.
This stuff is sinking in slowly.

Martin Mallinson sounds like he comes from only a few tens of miles North of me.
Pity he has moved away, I would gladly buy him a few beers over a chat.

When you say "re-clocking the input clocks is a bad idea" I gather you mean
in relation to 9018 MCLK, not just "cleaning up the edges" in relation to the transport clock.

Thanks again for the information.

[qusp]

Originally Posted by BrianDonegan

There are no re-clocking flip-flops on the Buffalo. When using the onboard 100MHz XO (asynch).

Those chips are analog switches for controlling the input selection (I2S/DSD or S/PDIF).

OK thanks for clearing that up. it seems i'm not the only one that misread your claims of a reclocker as something external to what exists in the ESS dac itself, it is certainly framed as such; whether intentional or not it reads as a new feature that you have implemented; rather than something that has not changed since the Buff32.

re-clocking the input clocks is a bad idea. It basically makes it impossible for the internal jitter elimination to function properly.

that is your opinion.

You can also look at it in the way, that if there is nothing for it to do, because the input jitter is no more than that of the very low jitter clock and flip flop in series, it can only add error (even if it is silly small error), so the best result is actually that it doesnt know what to do and does nothing IMO.

That is kind of the point of things like the fifo, to take responsibility for these functions and delete the crossing of clock domains altogether, making the transport and dac temporally one.

at the very least it gets rid of the ESS warm up time for dropouts on hires material. there is no more data to show it is detrimental than beneficial.

I've seen that video several times already, its quite interesting, he does waffle a bit, but in general I agree with most things he says and understand he has to pander to the audiophile masses somewhat with some of the language and make some stuff up for what parts even they dont really fully understand.

However it is their stance that the ESS is essentially faultless in every way, in everything it does. that is not the case, it seems unusually sensitive to jitter on BCK, it seems unusually sensitive to ripple on ground in Async mode, the digital filter is not perfect and the MUX is a bit bunky and it is not source agnostic in my experience with both your ESS dacs and Ackos.

I still prefer it over everything ive tried when used as a DAC only and will continue to use it for the foreseeable future, but I do believe that some of the integrated functions are now better served by more modern solutions to help it along. software or FPGA apodising digital filter, synchronously clocked buffered source/transport and external DSP are all better now ~4 years later.

the ESS reclocking scheme is very good and was revolutionary at the time, but I do believe it has been superseded.

you of course are rational to go with what your experience tells you just as I am. I do not believe either way is specifically wrong.

[DQ828]

Originally Posted by glt

Looks OK

Thanks