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Old 18th January 2013, 11:56 AM   #131
Bunpei is offline Bunpei  Japan
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Quote:
Originally Posted by qusp View Post
perhaps (havent tested this) the default DPLL is 'best' meaning it will try settings until it has stable lock,
Would you tell me how you got this explanation? I have never found any documented tecnical explanation on the "default best".
I always appreciate a technical details of "DPLL".

By the way, have you received my private e-mail sent early this year?
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Old 18th January 2013, 12:24 PM   #132
qusp is offline qusp  Australia
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i've forgotten where I saw it outlined, think it was Russ. its very vague in the datasheet, but reg 25 mentions 'use the best DPLL settings', as opposed to 'allow all settings' which says to me its something other than 'lowest' or it would just be duplication and it does provide more stable operation.

the post I saw mentioned that it would widen the bandwidth until it had stable lock, thus it uses the 'best' it can given the particular jitter environment. now how dynamic a process that is I dont know, it may just select a setting relaxed enough that it can assure solid lock, or it may actively loosen it until it gets to that point and stop.

thats why I though glt might be more in the know here because hes the sabre google master and may have found something more definitive, or perhaps included it as a factor in his DPLL testing

no I havent seen an email, sorry i'll check in a moment, I probably received it but my mailbox has been pretty flooded lately with group buy stuff. i'll be out all day tomorrow and have got more GB stuff to take care of now to make sure I can get the NTD1 parts out the door on monday-tuesday given I wont be around tomorrow to deal with it, but i'll have a look, or you could resend and i'll get back to you Sunday when I get home.
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Old 18th January 2013, 04:12 PM   #133
glt is offline glt  United States
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Hey KlipschKid, congrats!

Will be awaiting your report on the sound and selection of opamps. Have been using my DACs straight Vout so have no experience with the opamps.

Congrats too to diyinhk for providing this board at cost/near cost to us diyers

And of course, congrats to ESS for producing a good DAC chip.



Quote:
Originally Posted by KlipschKid View Post
Hoping to build an arduino at some point but at this point, with the exception of the ground plane mod, I've built this as cheaply as possible....
You mean the gnd mod was not cheap? :-)
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Last edited by glt; 18th January 2013 at 04:14 PM.
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Old 19th January 2013, 12:23 AM   #134
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Haha.. you're right - the copper is cheap... perhaps I should have said I built it badly .... "If it doesn't fit, you're not hitting it hard enough".

I couldn't resist a listen this morning - it's been on all night ....

Bear in mind I have a low-clock freq, a low quality op amp regulator, and noise from the usb getting into it... and you might not be surprised to hear it needs improving. In this configuration, it's not as good as my best DAC, and actually has some technical problems too. It's very detailed, has good depth and space, and is punchy but I don't like the signature - too much "white water" at the top end instead of flowing smoothness, if you can get that meaning = over-bright and some exaggerated detail with a little distortion.... in other words. Not a lot of thd but it shouldn't be there. I'm blaming the usb for this - but wait and see.

Issues to address
- very rare but once or twice it has "unlocked" - it seems a faster clock will solve this
- sound quality varies - there's sometimes an HF crackle, almost vinyl like - which spoils the otherwise dark background
- modify the psu for the op amps. There's something wrong with that Ebay kit. ( No surprises there eh ? Ebay junk... )
- isolate the USB / I2S and power the usb card from the sigma11

I'll very interested to know what you think when you get yours running, because you have the Buffalo to compare it with. For me, I much prefer the sound from the dual AD1955 at this stage. However, I can tell this DAC has great potential because the "low-jitter" is evident.

Anyway, I wanted to find out how bad it could sound and now I know, so next week I'll start upgrading.

cheers

Last edited by KlipschKid; 19th January 2013 at 12:37 AM.
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Old 19th January 2013, 02:45 AM   #135
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Quote:
Originally Posted by KlipschKid View Post
Haha.. you're right - the copper is cheap... perhaps I should have said I built it badly .... "If it doesn't fit, you're not hitting it hard enough".

I couldn't resist a listen this morning - it's been on all night ....

Bear in mind I have a low-clock freq, a low quality op amp regulator, and noise from the usb getting into it... and you might not be surprised to hear it needs improving. In this configuration, it's not as good as my best DAC, and actually has some technical problems too. It's very detailed, has good depth and space, and is punchy but I don't like the signature - too much "white water" at the top end instead of flowing smoothness, if you can get that meaning = over-bright and some exaggerated detail with a little distortion.... in other words. Not a lot of thd but it shouldn't be there. I'm blaming the usb for this - but wait and see.

Issues to address
- very rare but once or twice it has "unlocked" - it seems a faster clock will solve this
- sound quality varies - there's sometimes an HF crackle, almost vinyl like - which spoils the otherwise dark background
- modify the psu for the op amps. There's something wrong with that Ebay kit. ( No surprises there eh ? Ebay junk... )
- isolate the USB / I2S and power the usb card from the sigma11

I'll very interested to know what you think when you get yours running, because you have the Buffalo to compare it with. For me, I much prefer the sound from the dual AD1955 at this stage. However, I can tell this DAC has great potential because the "low-jitter" is evident.

Anyway, I wanted to find out how bad it could sound and now I know, so next week I'll start upgrading.

cheers
-cm6631A must use synchronous clock to avoid the lock issue, the ebay item description has the detail connect instruction. For asyn clock operation, amanero seems the only working solution now. xmos reference board is also tested and it also has lock issue in asyn clock operation.
-same as above
-no problem with the ps to the opamps, the ground is also connected on the bottom layer! it is not only connected on the top layer at one point. Actually, The digital ground and analog ground is segmented in this arrangement to avoid too much noise inject to the analog section.
I am also testing other ground plane arrangement but the current version is work flawlessly
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Old 19th January 2013, 02:50 AM   #136
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Hi,

I think the "whiteness" is quantization noise because of the low freq clock. I tried a much faster clock and the sound seemed much better. I'll try synch from the CM next.

I notice the board has u.fl connector pads for clock input. Can you recommend a part that will fit this ? I'm not familiar with such parts so your help would be great, especially a part code from Element14 here in HK.... ;-)

The problem with the psu for the op amps is not your board. It is the psu kit I bought from a different seller on Ebay. I think it keeps dropping out of regulation, maybe a dry joint somewhere.

For the ground planes, I think you should think about adding vias between the gnd planes near the I/V resistors. I would also suggest you remove the smd pads for the I/V resistors and allow only through hole. This way, the area under these resistors can be changed into a continuous ground. It's a simple change so people won't need to do the ground plane mod.

Thanks,

Tom

Last edited by KlipschKid; 19th January 2013 at 03:09 AM.
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Old 19th January 2013, 03:02 AM   #137
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Quote:
Originally Posted by KlipschKid View Post
Hi,

I think the "whiteness" is quantization noise because of the low freq clock. I tried a much faster clock and the sound seemed much better. I'll try synch from the CM next.

I notice the board has u.fl connector pads for clock input. Can you recommend a part that will fit this ? I'm not familiar with such parts so your help would be great.

Thanks,

Tom
asyn 100M clock with CM and XM is tested it will have lock issue.
lower than 40M clock is also tested it will have serious sound distortion problem, I don't know if it's call quantization noise.
u.fl is used to connect to an external clock source, wikipedia has many useful information. I heart somebody even use ufl to connect to an atomic clock, but I can't recommed as it's very danger, radiation is hazardous to health and to the surrounding people
Hirose U.FL - Wikipedia, the free encyclopedia
http://www.hirose.co.jp/cataloge_hp/e32119372.pdf

Actually, I think something can at less pleasure myself to pleasure others, I always use smt component
There is always new version pcb coming, 4 layer board should solve the ground plane problem easily, but you may also interest to see our new AK4399 pcb available in this few day, it's 2 layer but it has a newer power trace arrangement in the IV section. the top layer is a complete solid ground plane

Last edited by diyinhk; 19th January 2013 at 03:26 AM.
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Old 19th January 2013, 03:43 AM   #138
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Default Passive filter output stage for ESS

Here's my first stab (just design and simmed in LTSpice, nothing built so far) for a passive filter output stage for this DAC. Not proprietary, anyone is free to use, copy, modify whatever

Key features - 4th order Butterworth response, HF linear opamp (no LTPs!). Caveats - its designed for great sound, the noise performance won't suit some as the LT6552 isn't a quiet chip. It is cheap though
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Old 19th January 2013, 06:17 AM   #139
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I had wondered about 2 x JG jfet filter buffer on balanced output of IV stage for 9018 but haven't got a 9018 DAC to test it on. Thoughts? Component matching for balanced will add cost but is a pretty simple circuit.

Just a thought, I might have missed something that disqualifies that circuit for the 9018 DAC. I'll be building one for se output of my ES9023
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Old 19th January 2013, 06:41 AM   #140
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Its not a disqualifier, but the JG filter uses a much bigger inductor (18mH) which resonates around 500kHz due to the parasitic capacitance. Hence rejection at 1.5MHz won't be great. Whereas my circuit seems to have rather a nice notch around that frequency
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File Type: png glt-ess-fr.png (4.2 KB, 452 views)
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Last edited by abraxalito; 19th January 2013 at 06:44 AM. Reason: Added FR plot
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