AD1865 schematic

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The reason to reduce the supply is to keep the power supply noise low as noise is enemy no.1 to decent sound. The edge speeds reduce nicely at such a low supply voltage.

I doubt reducing the operating voltage of the glue logic will have much effect on the performance of the DAC since the logic is powered from an independent supply. A more appropriate measure would be to convert the 64-bit stereo frame to two 32-bit mono frames operating at half the bit clock rate. That will reduce the power draw and associated noise considerably. Easy to do with mono or dual-mono DACs like the AD1865.
 
It seems to me that the difficulty in making these determinations is the lack of sufficiently accurate jitter measurement tools AFFORDABLE to the home hobbyist. I've become increasingly uncomfortable with simply applying circuit and layout techniques which, in theory, should reduce jitter. I would like to know what effect such techniques are actually having on jitter. If anyone knows of any such affordable tools, please share your knowledge. I currently have a decent 192ksps, 24-bit PC sound card from M-Audio with which I currently perform spectral analysis and FR plots. Perhaps, there is an inexpensive Windows based software tool available?
 
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Isolated power for the crystal/osc either with an LDO or minimum cap, ferrite, cap.
Place the crystal/osc as near as humanly possible to the clock input pin, the clock traces should be as short as possible. Simulate signal integrity using SIV software to check waveform and determine whether any termination is required. If driving more than one chip (or it has to travel any distance) use a clock ditribution ic, again check signal using SIV software taking layout into account and determine what if any termination is required. Thats what happens for realy critical stuff. Then some kit where you can get eye diagrams to check everything, It would be interesting to see what some clock mods do do to the signal...
 
Im thinking of using Mic5207 regulators in adaptors instead of Salas regs, in order to keep the size of construction more compact. I was looking the datasheet (http://www.micrel.com/_PDF/mic5207.pdf) and saw this :

"Dual-supply operation.
When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground."

Is the orientation of the diodes correct in the attached picture?
 

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Finished construction of the CS8416 and AD1865 Iout boards today.
First impression is really positive.
I am starting to see why people say multibit dacs are better.
The music is more engaging, sound is easier to listen and full of detail.

Next upgrade will include changing the rectifiers to soft recovery types and low noise regs.

The only downside is the relatively low output volume because of the passive i/v (200r Susumu RG). Im feeding the signal to a MyRef RevC through a 10k stepped attenuator

Would an opamp gain stage after passive i/v be a bad idea? ( I have some LT1361 and opa627 laying around :D)
 
Opamps tend not to like the high levels of RF coming out of DACs, I recommend passive (LC) filtering before the opamp - OPA627 is one of the better ones at dealing with RF. Better still though an AFA like AD830, this one is highly RF resistant and sounded great when fed with TDA1545.
 
Finished construction of the CS8416 and AD1865 Iout boards today.
First impression is really positive.
I am starting to see why people say multibit dacs are better.
The music is more engaging, sound is easier to listen and full of detail.

Next upgrade will include changing the rectifiers to soft recovery types and low noise regs.

The only downside is the relatively low output volume because of the passive i/v (200r Susumu RG). Im feeding the signal to a MyRef RevC through a 10k stepped attenuator

Would an opamp gain stage after passive i/v be a bad idea? ( I have some LT1361 and opa627 laying around :D)

You might well consider adding an op-amp voltage gain stgae after that 10K attenuator. That would allow you to use a much lower passive I/V resistor, thus provoking less distortion at the AD1865's outputs, while both increasing the output signal level and lowering it's output impedance. I find that the sound becomes more focused, more solid, as the passive I/V resistor value is lowered.
Compensate for the reduced signal amplitude via the op-amp gain setting. In addition, be sure to low-pass filter the signal somewhere above 20KHz and prior to the op-amp inputs.
 
Thanks you guys for your suggestions.
I'll try to do both and see what i like best.

What value for i/V resistor do you recommend? Is 50R low enough or can i use even lower values?

About using an RC filter on the opamp inputs (excuse my cluelessness! :D): Inserting a capacitor to ground after the I/V resistor forms an RC filter or not?
 
50R should be fine. Even so, you could experiment with lower values while compensating via the opamp gain setting. Use your ears to judge where the best tradeoff occurs. Don't sweat this too much, if you don't feel you hear an improvement then leave well enough alone.

Yes, a capacitor to ground (meaning, in parallel with the I/V resistor), while better than nothing, will form too shallow a roll off slope to provide significant digital image rejection.
 
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Made the following changes:

Changed the I/V resistor to Vishay S102c 61.05 ohms and the parrallel capacitor to 13.7nf Rifa PFE225 polystyrene giving a cutoff frequency at 190.29Khz. Sound was really good but the volume low so i etched a board of Yardbird from Russ White

http://www.diyaudio.com/forums/head...d-opa627-637-buf634-preamp-headphone-amp.html

I replaced R2 with a piece of copper lead and replaced R5 value to 15kohms RN55 dale. Now the sound is of proper volume but less trasparent maybe due to the fact that i use generic metal film resistors and a standard lm317 lm337 psu to power the Yardbird (soon to be replaced by a Salas V1.0).

Are the resistor values in yardbird correct for this kind of use? Can i use lower values to lower resistor noise and retain the amount of gain?
 
Isolated power for the crystal/osc either with an LDO or minimum cap, ferrite, cap.
Isn't it desirable to have a ferrite or inductor on the LDO's input before the input cap? The LDO's regulation bandwidth is probably 10s of kHz max, meaning high frequency chaff from the digital side passes through the junction, package, and layout capacitance parallel with LDO's input and output. I haven't seen any measurements of this above 10MHz or so but regulator PSRR is generally fairly degraded by a few MHz. For a 100mA or so LDO that'd be used to power an XO a 10 cent chip inductor and some decent layout yields an LC input lowpass that's good to a few hundred MHz. Hits peak attenuation in the tens of MHz, which is right where you'd want it for isolating typical audio clocks.

Would an opamp gain stage after passive i/v be a bad idea? (I have some LT1361 and opa627 laying around :D)
As Ken and Abraxilito have mentioned it's a good idea. Figure 10 of the datasheet uses a pretty typical second order multiple feedback lowpass that's a reasonable starting point for either voltage or current out. IMO the additional image rejection from third order is worth it but there's no hard requirement to filter before the op amp inputs---both Burr-Brown (TI PCM) and ESS use instrumentation amplifier type topologies where the DAC output goes directly to the op amp summing junctions to achieve DNR 15+dB greater than the AD1865's with basic parts like the NE5532. There is usually a shelf in the instrumentation amp front end's feedback but it's not normally more than 25 or 30dB. One of the more interesting variants of this topology is the one Analog uses with the AD1955, which also has a cap in parallel with the IV resistors.
 
About using an RC filter on the opamp inputs (excuse my cluelessness! :D): Inserting a capacitor to ground after the I/V resistor forms an RC filter or not?

RC filtering doesn't provide much protection of sensitive opamp input stages from the copious RF coming out of a DAC. Nor, as Ken's pointed out, does it do much for image rejection.

I've recently put up on my blog an active elliptic filter with about 30dB gain which could be a viable solution here, though I've not yet built it myself. The opamps can be very fast ones (I'm planning to try with AD8014, very low power for the GBW) and hopefully the 50dB stop-band rejection will help considerably with IMD in the downstream amp. I'm curious to find out how it'll sound compared to a similar response passive filter.
 
Isolated power for the crystal/osc either with an LDO or minimum cap, ferrite, cap.
Not both either, though a pi filter with a ferrite will remove any high frequency noise from other and is often used especially where LDO's follow a switch mode usually where multiple voltages have to be generated for a processor, FPGA or the like.
 
First thoughts:
power tracks could do with being a bit thicker, same width as signal traces.
The SMD caps next to the pins on the large IC could do with moving away from the pins a bit, this will ease assembly especially soldering.
Try and keep traces either 90 or 45 degree, a minor thing, keeps things looking tidy.
Vias look close to decoupling caps on chips on the bottom of the board.
Large capacitors cover SMD caps footprint on large chip, high frequency SMD decouplers need to go next to pins, larger ones can move away from pins.
Don't use thermal relief on Vias, it is not needed.
Other than these minor points well done for a first attempt.
 
Thank you marce for your kind words and suggestions. Really appreciate it
I will do modifications based on your suggestions.
The tracks have all the same thickness (0.51mm), maybe resizing the screen capture caused some distortion on the image presenting some tracks thinner.
Thanks again :)
 
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