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Old 11th November 2012, 03:56 AM   #51
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Default Examples...

Hi,

This is a very useful thread - thanks for the contributions - it's made great reading and I keep coming back to it to dip into the resources Marce posted.

Thanks !

I wonder if anyone would be willing to have a quick look at this and answer some very simple yes/no questions.

It is an example of what, to me, looks like routing that needs to be much improved. Is it very bad, bad, okay, or not-to-worry ? I know it's not great.

There are numerous kinks and vias and the terminating resistors, although smd, are at the receiving end.

Click the image to open in full size.

The transmitter is Altera Cyclone III EP3C16. The datasheet says Iout for each pin is 40mA, which seems quite high to me, but basically it seems to be quite a low impedance output. Have I understood this correctly ? Does this mean the routing and termination are acceptable ?

http://www.altera.co.uk/literature/h..._ciii52001.pdf

Thanks for any comments. Much appreciated !

Last edited by KlipschKid; 11th November 2012 at 04:07 AM.
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Old 11th November 2012, 04:31 AM   #52
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Another pic - higher res.

Click the image to open in full size.
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Old 11th November 2012, 08:58 AM   #53
marce is offline marce  United Kingdom
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Without the schematic and knowing what the devices are I could not comment on the placement of the resistors, though series should always be at the transmitter end.
As to the routing; there is nothing basicly wrong with the signal routing, it looks like any standard digital board. What are your concerns with the signal routing?
What would be of concern to me and would require sorting is the copper pour (GND) between the signals, if you look closely you will notice that there are numerous slivers of copper pour that do not have stiching vias at least at each end, these for dipole structures on the board, not good for emc.
So to sumerise, the signal routing is standard for digital, it will not cause any problems whatsoever, the ground copper pour though does not have enough stiching vias (to one would hope a full contigous ground plane on an inner layer) and there are long slivers that have only a via at one end.
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Old 11th November 2012, 09:15 AM   #54
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Smile Thanks

Thanks for the reply.

My concerns are really because it is a high data rate, a 2-layer (probably cheap) PCB, the terminating resistors are quite large (100ohm), and there are numerous kinks and vias.

I saw the gnd pours and I hoped these would be beneficial but perhaps it'll need some work. I have a scope but only 12Mhz, so it might be tricky to improve it if it's a lemon.

I'll give it a go though.

Thanks again for the comments.
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Old 11th November 2012, 10:10 AM   #55
marce is offline marce  United Kingdom
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Its not going to have to high a data rate, so I would worry to much on that score. If the waves look OK (dont forget to take into account your scope probe loading) then I wouldn't worry.
Series resistors are there to match the signal to the layout topography, so there is realy no off the shelf value, it depend on the layout topography andf impedance, there are only two ways to determine the value:
Simulate the design using signal integrity tools and choose the best value, or try different values and see which gives the best measured result. Attached are some screen shots showing the actual difference different values of series resistors make, in this case 82R was chosen.
Vias and Kinks in traces will have no noticable effect on signal integrity at frequencies and rise time the DIYer is gonna be playing with, but with good layout you can minimise the number of layer changes a signal has between A & B.
My main concern would be a two layer board, these days ALL digital designs should be 4 layers min, with a full contigous ground plane. The main problem these days is signal rise time, which are forever getting faster and faster, and ultimetly it is the rise time of a signal (suignals) that determine whether a design is high speed.
Yes ground pour help if they are done correctly and are a must for two layer digital boards, but they need lots of stiching vias to be of any use.
Attached Images
File Type: png 22R_Term_AP.png (41.6 KB, 316 views)
File Type: png 56R_Term_AP.png (37.2 KB, 299 views)
File Type: png 82R_Term_AP.png (36.5 KB, 290 views)
File Type: png 16MHz.png (66.2 KB, 76 views)
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Old 11th November 2012, 06:49 PM   #56
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Greetings to all. I am exporting I2S/DSD to an external DAC from a Denon 3910. I tapped between the resistor and PCM1796 DAC chip because at the time I had no idea what they were for. (Still learning....).
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File Type: jpg wires.jpg (249.1 KB, 121 views)
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Old 12th November 2012, 10:16 AM   #57
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Thanks again Marce. I've ordered the DAC and I'm getting the seller to build and test it. I'll post more info when it arrives.

Racer - I see your resistors are near the DAC IC. Naughty Denon ? ;-)
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Old 12th November 2012, 11:42 AM   #58
marce is offline marce  United Kingdom
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A few related links, I have lots more regarding SIV etc:
http://www.ti.com/lit/an/spraak6/spraak6.pdf

http://www.ultracad.com/mentor/mento...0placement.pdf

http://www.the-signal-and-power-inte...Location_2.pdf

http://www.ti.com/lit/an/scaa082/scaa082.pdf

Sites for more in depth Signal Integrity guidelines

beTheSignal.com

Signal Consulting, Inc. - Dr. Howard Johnson

Another usfull site:
Welcome to the Signal Integrity Prescription Monthly Column With Dr. Eric Bogatin
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Old 12th November 2012, 03:24 PM   #59
syklab is offline syklab  Hong Kong
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This thread is very informative, thanks to marce!
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Old 13th November 2012, 12:18 PM   #60
marce is offline marce  United Kingdom
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No problem, I layout PCBs every day of the week and have done for over 25 years now, and do a lot of high speed, SMPS and hi reliability PCB layouts. I have always got this info to hand, not only for use at work, but for a PCB forum where we get asked the same questions repeatably.
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