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Old 21st April 2012, 05:44 PM   #21
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Is the setup used on my board optimum? will the output of the CS8414 communicate with the SM5842 correctly? Is it better to use a clock on board?
What does the "dither" function do, does it improve sound quality?
I never thought there would be so much to consider when making a DAC.
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Old 21st April 2012, 06:26 PM   #22
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Already said. The clock is in the signal source.
Quote:
Originally Posted by SoNic_real_one View Post
Yes it works. The external clock is the one embedded in SPDIF, extracted and put to MCK.
For other questions I already said that you might want to use some kind of switches or jumpers.

Click the image to open in full size.

Last edited by SoNic_real_one; 21st April 2012 at 06:29 PM.
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Old 21st April 2012, 06:28 PM   #23
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Sorry, I think I just posted the same thing twice.
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Old 21st April 2012, 07:02 PM   #24
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Re-did the grounding like you said.
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Old 21st April 2012, 07:19 PM   #25
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Can you move out that copper bridge from under the DAC ?
And you have one extra bridge that you could run on PCM - the power for the SM regulator can go under the GND bridge.
I would use bridges for the digital signals from SM to AD and route the outher signals on the PCB. Is eases the future testing with an oscilloscope.
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Old 21st April 2012, 07:49 PM   #26
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I really cannot make the PCB any wider than it is now it won't fit into my shield if its any bigger.
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Old 22nd April 2012, 08:27 PM   #27
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I have made some more changes to the PCB. I made the CS8414 output 16-Bit I2S and set the SM5842 to accept the 16-Bit I2S. I disconnected the MCK from the CS8414 because everybody says its high in jitter. I put the SM5842 in Jitter-Free Mode (SYNCN=HI) I'm going to use a 11.2896Mhz 1pps TXCO for SM5842.
How does a TXCO compare to the usual XTAL between the XTI,XTO pins, as the cost of TXCO's is pretty high?
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Old 22nd April 2012, 10:34 PM   #28
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I don't think is a good ideea using a different clock for the SM5842.
The audio DATA will have the same jitter as the MCLK. If you use a different clock instead of MCLK, you still have the incoming DATA jitter. The SM will approximate the location of the incoming data, it will add or skip samples based of the instantaneous difference between the DATA (that had the embedded MCLK) and your local XTAL.
The MCLK tells the DAC when the DATA is ready to be converted. Having an arbitrary clock, with no relation to the incomming data is... wrong, not better. They will have to resynchronize periodically. Even the data sheet says: "Note that resynchronization affects the internal operation and can generate a momentary click noise output."

Last edited by SoNic_real_one; 22nd April 2012 at 10:42 PM.
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Old 23rd April 2012, 12:07 PM   #29
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if i cannot use the external clock for the filter. what would be the best method to reduce jitter in this dac
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