Si570 based 2ps RMS low jitter universal audio clock project - diyAudio
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Old 11th April 2012, 03:36 AM   #1
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Default Si570 based 2ps RMS low jitter universal audio clock project

I have been thinking about design a Si570 based low jitter audio clock board for a long time. At the beginning, I thought it would be part of the asynchronized FIFO project. But later on, I realized it could be a universal audio clock board supporting different kinds of digital audio applications, integrating with FIFO is just one of its features.

Si570 is one of the flagships of Silicon Labs low jitter programmable XOs. It’s based on DSPLL technology. Ham guys did a lot of research on it to improve their radio signal quality and found it comes with very good performance by comparing with other high-end low phase noise oscillator sources. The good thing is, with only one chip, it could generate low jitter clock at any frequency between 10-160Mhz, which can cover all the digital audio frequencies range, such as 11.2896 ….24.5760…33.8688...49.1520….98.304MHz….

From the specification, the time domain period jitter is 2ps RMS and 14ps PEAK-TO-PEAK, which sounds not that bad.
At the phase domain, although the close-in phase is not as good as CCHD957, but it’s already much better than most of the normal audio oscillators we can touch.

Here I have a comparison table,

CWX813 Si570 CCHD957
10Hz -60dB N/A -97dB
100Hz -90dB -112dB -126dB
1KHz -125dB -122dB -148dB
10KHz -140dB -132dB -162dB
100KHz -145dB -137dB -171dB
1Mhz N/A -144dB -170dB
10Mhz N/A -150dB N/A

I’m having an original Si570 evaluation board, so I got chance tasting it on my FIFO platform before I really finish the clock board. During the real listening test, the sound of Si570 was quite impressed. It comes with much more details and crystal clear wide and deep 3D imaging. Actually I tested a whole bunch of clocks. Si570 beat all of them except CCHD957. It's better than what I expected. So, I decided giving the Si570 clock board a try.

Here I list both advantages and disadvantages of Si570 based clock board just for reference

Advantages:
1. Generating low jitter audio clock for multi-frequencies with one chip solution. Especially for some frequencies for which very hard to get good audio clocks.
2. Not that sensitive to the power supply.
3. To cover the full digital audio frequency range, the cost will be less than using CCHD957 or other low jitter oscillators.
4. Supporting almost all kinds of applications which need low jitter digital audio clocks such as CD players, SACD players,Network/HD players, DACs, USB interface, ASRCs,DSPs…...
5. Integrating with FIFO project seamlessly to switch between different Fs.
6. Very flexible and calibratble under the software support.

Disadvantages:
1. Close-in phase noise performance is not as good as CCHD957 or sc-cut oscillators.
2. Need software driver when switching frequency (not all the time).
3. 100mA power consumption which is a bit higher than normal oscillators.

Below are pictures of Si570 and the evaluation board
Attached Images
File Type: jpg Si570.JPG (449.1 KB, 773 views)
File Type: jpg Si570EVB.JPG (665.6 KB, 757 views)
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Last edited by iancanada; 11th April 2012 at 03:51 AM.
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Old 11th April 2012, 04:44 AM   #2
qusp is offline qusp  Australia
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cool, you know i'm interested =)
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Old 11th April 2012, 04:44 PM   #3
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Yeah, it is a favorite of HAM radio people.
I suspect you are thinking of a group buy, so I'll give my suggestions:

- Two board design: one for the clock and related power exposing the I2C interface, the other for the uP (and display, etc)
- Selectable I2C address for the clock board

If used with the FIFO kit, the clock can be tailored to match the input sample frequency and thus reduce the latency of having to fill up the fifo
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Old 11th April 2012, 05:08 PM   #4
qusp is offline qusp  Australia
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I suspect, given Ian had this in mind the whole time, he has planned for its integration, I dont want to have to have the expense of a second board if the fifo itself has the brains needed
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Old 17th October 2012, 01:05 AM   #5
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Ian, is it better to restore this thread to keep the Si570 discussion out of the GB/FIFO thread?
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Old 17th October 2012, 01:18 AM   #6
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yep post some pics of the finished board here mate, perhaps we'll be able to keep the trolls at bay that way
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Old 17th October 2012, 03:26 AM   #7
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To save repeat questions I have put together an index of (IMHO) the most interesting Si570 related posts by Ian in his FIFO R&D thread:

1. Post 881 - Initial testing of custom Si570 v1 board frequencies

2. Post 913 - ESS 9018 testing with sync mclk from Si570 - post includes selectable sets of frequencies for different DAC types and some discussion on next steps.

3. Post 929 - Additional comments & continuation of Post 913.

4. Post 1004 and Post 994 - Image of v2.0 pcb layout and new features in v2 design.

[I hope these links work for everyone, I have removed the page number and just included the post# in the url, which I think should result in diyA autoforwarding everyone based on their own number of posts/page setting in their user profile]
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Old 17th October 2012, 05:44 AM   #8
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I think this set of data is quite pertinent to this thread also. I missed it in my earlier review of the FIFO thread. Perhaps this is just a slightly better formatted version of the table in Post #1 of this thread though.

Quote:
Originally Posted by iancanada View Post
.........Si570....... CCHD957
10- Hz N/A .........-97dB
100Hz -112dB ....-126dB
1-KHz -122dB ....-148dB
10KHz -132dB ....-162dB
100KHz -137dB ...-171dB
1-Mhz -144dB .....-170dB
10Mhz -150dB ......N/A
100Mhz N/A .........N/A
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Old 17th October 2012, 06:01 AM   #9
qusp is offline qusp  Australia
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there was a post that included info from the cchd950 as well. looking at the datasheet now, close in phase noise is better than 950 in the 80MHz and 130MHz, but gets beat by the 50 and 100MHz
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Old 17th October 2012, 11:01 AM   #10
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According to the si570/571 datasheet,

above shown si570 phase noise numbers are measured at LVDS output with 120mhz offset freq.
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