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Old 9th March 2012, 02:40 PM   #1
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Question buffer SPDIF input stage for ESS9018

This buffered SPDIF input stage designed by Jocko Homo can avoid dropouts in my Buffalo III?

Rz 100R
R1 300R
Cz 4,7pF/5pF

Hex Inverter used Phillips 74HC04N instead of 74HCU04, operating voltage between +5V

Is there is a way to improve the schematic or needs other operating voltage, suggestions will welcome.
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Last edited by merlin el mago; 9th March 2012 at 03:21 PM.
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Old 12th March 2012, 01:40 PM   #2
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Please help!
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Old 12th March 2012, 01:55 PM   #3
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Quote:
Originally Posted by merlin el mago View Post
Please help!
What about this circuit do you feel requires improvement, are you having some kind of trouble with it?
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Old 12th March 2012, 01:58 PM   #4
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Yes, BIII can't lock?
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Old 12th March 2012, 02:36 PM   #5
qusp is offline qusp  Australia
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but you have been having locking problems with your buffalo dacs since BII, are you sure there isnt something else going on?
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Old 12th March 2012, 02:58 PM   #6
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Yes, also problems with lock using CD or Hiface but when used DAC2000 (Crystal 8414 +DF1704+PCM1704) never lock problems....lock problems only with BII & BIII

Do you know if "Ian asynchronous I2S and S/PDIF FIFO KIT GB" can fix the lock issue reducing jitter?

Last edited by merlin el mago; 12th March 2012 at 03:03 PM.
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Old 12th March 2012, 03:48 PM   #7
JensH is offline JensH  Denmark
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Perhaps you should try using the unbuffered 74HCU04. For this kind of analog applications the unbuffered version normally works better. Have you measured the output signals with an oscilloscope? Perhaps the buffered '04 generates additional transitions?

Does the circuit behind this require/tolerate a 0 to 5V signal?
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Old 12th March 2012, 04:13 PM   #8
qusp is offline qusp  Australia
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see i'm thinking there has to be something else going on here, i have no lock problems with my buff II, nor ackodac and I never have, yet you have had them consistently, to the point i wouldnt suggest for you to spend more money on the fifo just hoping to solve the problem when you do not really know what the problem is, only the result.

the jitter would have to be incredible to cause such a problem, i think you have some sort of electrical issue in your house that causes the unlock. does it not lock at all, or you have problems with it unlocking during use? dirty power spikes on the mains have been known to cause this sort of issue, as with ground loops.
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Old 12th March 2012, 09:09 PM   #9
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Quote:
Originally Posted by JensH View Post
Perhaps you should try using the unbuffered 74HCU04. For this kind of analog applications the unbuffered version normally works better. Have you measured the output signals with an oscilloscope? Perhaps the buffered '04 generates additional transitions?

Does the circuit behind this require/tolerate a 0 to 5V signal?
First of all I don't be sure if I can use 74HC04N instead 74HCU04 for the attached schematic both voltage range 2V-6V

I don't know, the circuit behind is the Buffalo III.
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Old 12th March 2012, 09:11 PM   #10
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If I'm not mistaken, Thorsten Loesch, for one, doesn't much care for this type of circuit at the S/PDIF input. I seem to recall him writing about how the output being coupled back to the input sends interference back up the S/PDIF line.

Have you tested the reciever for lock robustness with the logic inverters out of circuit?
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Last edited by Ken Newton; 12th March 2012 at 09:16 PM.
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