Any good TDA1541A DAC kit?

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Hi,

What's the theory behind trimming the reference resistor for lowest HD? Just getting the waveform centred between the two end-stops?

Essentially - yes. In other words minimum THD with 0dbfs.

To me the advantage of paralleling the chips is to get better low-level distortion. Already I feel -75dB is plenty good enough at full-scale.

To me it was to be able to use a simple transformer coupled output.

Ciao T
 
Hi,

The only complete solution I've found (SPDIF -> I2S + DAC) is your article on the web about your Adagio DAC.
Do you think it can potentially sound better than the CD-777?

This is ca. 1998/99, build over the winter holiday. It is unlikely to be even close to the CD-777.

The "Vero-DAC" discussed above combined with a well implemented WM8805 (probably needs to go well beyond the Twisted Pear board though) and suitable analogue stage (maybe my final tube one with a really extremem tube rectified PSU) stands a chance, but I would not be betting too hard on the Vero-DAC.

As said, my own experimental TDA1541A DAC shown before does not match the DP-777 in 16 Bit mode... I even do not find the sound better with my 10K Noble Passive Pre than with the build in Analogue Volume Control. Supposedly my DP-777 is on it's way, so it should take residence in my system this week...

There is a LOT of optimisation in the CD-777 (and DP-777 and other AMR Products) that ('brax's complaints that all we do at AMR is trivial for any DIY'er to apply non-withstanding) is simply not readily accessible for DIY application and aims at optimising "bangs for bux" (as opposed to the CD-77 where we pretty much pulled the stops out).

Especially given the results of some recent tests against some of the big industry names, including ESS Sabre reference based stuff (done with DP-777 arguably, but using CD sources and 16 Bit mode) I suspect you are better off feeding your CD-777 some nice NOS Tubes and getting a nice USB-SPDIF converter for your HTPC to play back > 48KHz. If you do not need > 48KHz the CD-777's USB section is perfectly serviceable and has decently low jitter (despite not being Async).

Ciao T
 
Hi Thorsten,

The only complete solution I've found (SPDIF -> I2S + DAC) is your article on the web about your Adagio DAC.
Do you think it can potentially sound better than the CD-777?

Not thorsten, so you can take my comments or leave them but The Adagio is just the standard NOS CS8412-i2s thats been used with undreds of designs, other than the sunt regs there is nothing special about it. I think thorsten was hinting that a WM8805 receiver could make make an acceptable performance spdif to I2s input. I think I remember the 8412 adds 200ps intrinsic jitter, even the new dir9001 is down to 50ps and doesn't sound too bad if fed by an ultra low jitter transport.

Getting good performance from spdif with NOS has three options:
1. low intrinsic jitter modern receiver with better PLL/synthetic clock derived from a quality clock
2. Putting the receiver in slave mode and sharing the clock with the transport which has the galvaic islolation issue, and trasmitting a 11mhz lock back to a transport is challenging.
3. Synchrous reclocking with a VXCO andcustom PPL which I believe is beyond the work of DIY, there was a dutch team that pulled it off with the Tent OS DAC and it was very well thought of, you can read the artical but it is complicated as hell. Hagerman has a similiar scheme in his DAC but the IC PLL is controversial. The PLL VXCO technique seems to fallen out of favor.

The beter question may be is a wm8805 properly implemented worth the effort over the standard CS8412 topology used in the Adigio? And someone did mention using the WM8805's external clock to synch reclock/align as a new master clock right prior to the TDA1541, don't see this working as this would just seem to undo the work of the PLL and likely leave us with synch issues. We can work an a schematic with Thorsten's input.

Edit: Sounds like an advanced synchronous discrete PLL reclocking is being used and I agree they are beyond a DIY effort to do right . We can work on a WM8805 schematic if you are interested, sounds like Thorsten is saying this has some promise and would be worth the effort. If I remember right you are not wanting a computer and not using hirez?
 
Last edited:
Hi,

Not thorsten, so you can take my comments or leave them but The Adagio is just the standard NOS CS8412-i2s thats been used with undreds of designs, other than the sunt regs there is nothing special about it.

Completely agreed.

It was the third ever Non-Os DAC I build (first was TDA1543 and 2nd was PCM63) and as said, long ago (13 Years). The choice of receivers at the time was very limited (basically cirrus logic, cirrus logic, cirrus logic and the old Yamaha part if you had to be different, Philips had already exited the market IIRC).

As the circuit is quite generic I cannot really claim that other umpteen CS8412/TDA1541 DAC's copied me, but I believe I was the first to publish...

Getting good performance from spdif with NOS has three options:
1. low intrinsic jitter modern receiver with better PLL/synthetic clock derived from a quality clock
2. Putting the receiver in slave mode and sharing the clock with the transport which has the galvaic islolation issue, and trasmitting a 11mhz lock back to a transport is challenging.
3. Synchrous reclocking with a VXCO andcustom PPL which I believe is beyond the work of DIY, there was a dutch team that pulled it off with the Tent OS DAC and it was very well thought of, you can read the artical but it is complicated as hell. Hagerman has a similiar scheme in his DAC but the IC PLL is controversial. The PLL VXCO technique seems to fallen out of favor.

The PLL VCXO is still a PLL and has a very limited pull range as well as all the classic noise problems.

The fourth option is to do things the way AMR does in the DP-777, using a long RAM buffer and a programmable low jitter clock. As there is no attempt to phase-lock many issues are cancelled. Of course, you now need a programable clock and a few 1000 lines of code plus a big FPGA and a lot of FPGA code to make it work.

And when you do some testing you find that most sources give a wrong indication of sample rate in the subcode, so you end up implementing your own sample rate detection for which you need a bigger FPGA and a faster MCU, implement methods to make sure that you can establish a quick lock and all and what is conceptually simple takes a lot of manhours to make work.

The beter question may be is a wm8805 properly implemented worth the effort over the standard CS8412 topology used in the Adigio?

I can give you a little experience. At AMR we occasionally do designs for OEM customers. We did one design to replace a small DAC PCB for a very high end DAC (read massively build case, expensive finishing, endless hours spend tweaking passive parts and Op-Amp's and all, but of course using a completely generic circuit that was "designed" by an external "consultant")... The main board was basically the powersupply (317/337 by design but upgraded to LT drop in parts) and the analog stage (three Op-Amp's in a row, despite the fact that DAC itself was already voltage output).

This PCB was small, contained a CS8414 and an AD Delta Sigma DAC, single 5V supply from the main board. We instead implemented a WM8804 in hardware mode with a 317 as 3.3V regulator and a decent clock oscillator (in a can) and supply for said clock oscillator (basically a PFM Flea with a little extra magic from my own little black book).

The DAC part remained unchanged, the Powersupply for the DAC remained the same. The receiver changed to WM from CS and the implementation was decent but far from extreme. I must admit to having also contributed to fine-tuning the sound by having placed one Elna Silmic II capacitor in a critical location, which removed a slight edginess that remained with the originally (customer specified) Os-Con's, but that was it.

The impact of this new PCB was such that the customers that heard it all wanted the upgrade and dealers that had before complained the DAC sounded so-so now where quite enthusiastic.

Based on that result I do think the WM880X is worth some effort. Software mode is needed to get the best, but hardware mode can be used if 176.4KHz are not needed and some of the other optimisations can be done without.

And someone did mention using the WM8805's external clock to synch reclock/align as a new master clock right prior to the TDA1541, don't see this working as this would just seem to undo the work of the PLL and likely leave us with synch issues.

You must use the MCK for reclocking. I'll not say more in public on the detailed optimisation, sorry.

Ciao T
 
A piece of memory implemented in longish FIFO buffer, PLL and VCO.
Then the jitter goes down to several Hz. VCO should be accurate down to Hz range.
FPGAs. They are noisy...

Going with FPGAs/CPLDs will bring oppotunity of splitting-up the I2S into L and R, inverting them and feeding dual TDAs, each of which will serve single channel, with glich cancellation on I/V differential output.
Doing some sort of digital filtering/oversampling is possible too, with FIRs.
You can save on SPDIF receiver too - it could be implemeted on the PGA/PLD.

VHDL anyone?
 
Hi Thorsten,

The "Vero-DAC" discussed above combined with a well implemented WM8805 (probably needs to go well beyond the Twisted Pear board though) and suitable analogue stage (maybe my final tube one with a really extremem tube rectified PSU) stands a chance, but I would not be betting too hard on the Vero-DAC.

Thank you.
Unless I'll come upon well implemented WM8805 solution, there is no point in me giving this option any further thought.
 
A piece of memory implemented in longish FIFO buffer, PLL and VCO.
Then the jitter goes down to several Hz. VCO should be accurate down to Hz range.
FPGAs. They are noisy...

Going with FPGAs/CPLDs will bring oppotunity of splitting-up the I2S into L and R, inverting them and feeding dual TDAs, each of which will serve single channel, with glich cancellation on I/V differential output.
Doing some sort of digital filtering/oversampling is possible too, with FIRs.
You can save on SPDIF receiver too - it could be implemeted on the PGA/PLD.

VHDL anyone?

Another alternative would be to move the PLL to the transmitting side.

I have posted a first draft schematic of a proposed implementation here.

http://www.diyaudio.com/forums/atta...1541a-based-dac-dual-differential-dac_mk2.pdf
 
Hi,

What about the Hifidiy TDA1541A DAC this uses shunt regulators and a nice basic tube output with it.

Had a quick look, cannot find a schematic. Basic design looks like lifted from my 1998 design. No idea on tube stage. In '98 it would have been a good choice, for this day, your call...

Ciao T
 
Hi,



Had a quick look, cannot find a schematic. Basic design looks like lifted from my 1998 design. No idea on tube stage. In '98 it would have been a good choice, for this day, your call...

Ciao T
Maybe this will help: TDA1541 Main DAC Board Assembly Scroll down for a schematic of the main board.

Together with the UTS it sounds better than my previous dac's. Nevertheless, there's always room for improvement
 
1. What chips are they in the schematic?
2. Drawing an idea is one thing, while listening to the end results may be something different.

I was informed I only posted the first page of the schematic, my mistake I have attached a more complete schematic.

Of course results are never certain but I can't imagine a much simpler* way of having galvanic isolation, making the TDA accept 192K and getting everything slaved to a Masterclock in a dac.

* Simpler as in the amount of gates involved.
 
I was informed I only posted the first page of the schematic, my mistake I have attached a more complete schematic.

Of course results are never certain but I can't imagine a much simpler* way of having galvanic isolation, making the TDA accept 192K and getting everything slaved to a Masterclock in a dac.

* Simpler as in the amount of gates involved.

1. I don't see any attachment.
2. Read my previous posts, I look only for tested and proved solution of excellent sound quality. I'm not concerned about simplicity or complexity, only about sound quality.
 
Hi,

Maybe this will help: TDA1541 Main DAC Board Assembly Scroll down for a schematic of the main board.

This is a straightforward variation on my original design, the CCS with cascoded 317 is a little cute, HOWEVER the most crucial analog supply of the TDA1541A is left using a 317 as regulator! On the plus side, each of the 5 Voltages on the board has it's own winding and power supply section fully seperate, but the rectifiers listed in the page you linked are generic, not schottky, changing them to schottky types may be a good. However, changing the 317's on the -15V supply to LT1085 should be first order of business, if not changing to TL431 shunt and CCS.

While there is a solid and even sensibly split (at first blush anyway) groundplane, the decoupling is usual chinese audiophile BS with through hole film cap's where one really wants to see SMD...

Best get a replacement PCB with CS8414 and use extra decoupling using SMD ceramic caps on that Adapter PCB, it helps a lot. Or change to using a WM8805 based board or Async USB.

I would also have a look if there is a nice solid groundplane below the TDA1541 and if so get a bunch of SMD Film Cap's and place them at the decoupling and PSU pin's (you can leave what is already fitted in place).

Overall it is actually fairly decent, with much less foolishness and outright "defective by design - which was copied unquestioning of some internet post that was translated with babelfish and comply misunderstood" than common with chinese kits.

Together with the UTS it is probably quite close to my old DAC's with TDA1541, but it is a bit out of it's depth nowadays.

There was a recent set of posts on re-clocking the DEM oscillator with a circuit from Philips. This could be applied here, though a divider from bck may be needed, as 1.5MHz may be a little fast if we sync to BCK and WCK is on the slow side.

Together with the UTS it sounds better than my previous dac's. Nevertheless, there's always room for improvement

Yes, I am sure it has the core qualities that make these old Philips chips so interesting. It will lack some refinement, detail and soundstage expansion. Personally I could probably be quite happy with it, with some minimal tweaking.

Ciao T
 
Hi,

Maybe this will help:

PS, connect 100uF/6.3V across the cathode to Adj resistor (R5, R7, R9, R13) to get the lowest possible impedance from the TL431, quality is not super critical, so no need to go Os-Con or Black Gate.

And if you replace the CS8412 with a CS8414 on adapter you should get a C0G 0603 SMD Cap (3300pF) and fit it directly at the CS8414 Pins and remove it from the main PCB. In fact I would probably move the whole set of parts on the FILT pin of the CS8412 to SMD and onto the adapter PCB.

C31, C36 and c39 are worth putting large values (small physical size) in place, C9, C11, C13 can use Elna Silmic.

Ciao T
 
Hi,



This is a straightforward variation on my original design, the CCS with cascoded 317 is a little cute, HOWEVER the most crucial analog supply of the TDA1541A is left using a 317 as regulator! On the plus side, each of the 5 Voltages on the board has it's own winding and power supply section fully seperate, but the rectifiers listed in the page you linked are generic, not schottky, changing them to schottky types may be a good. However, changing the 317's on the -15V supply to LT1085 should be first order of business, if not changing to TL431 shunt and CCS.

While there is a solid and even sensibly split (at first blush anyway) groundplane, the decoupling is usual chinese audiophile BS with through hole film cap's where one really wants to see SMD...

Best get a replacement PCB with CS8414 and use extra decoupling using SMD ceramic caps on that Adapter PCB, it helps a lot. Or change to using a WM8805 based board or Async USB.

I would also have a look if there is a nice solid groundplane below the TDA1541 and if so get a bunch of SMD Film Cap's and place them at the decoupling and PSU pin's (you can leave what is already fitted in place).

Overall it is actually fairly decent, with much less foolishness and outright "defective by design - which was copied unquestioning of some internet post that was translated with babelfish and comply misunderstood" than common with chinese kits.

Together with the UTS it is probably quite close to my old DAC's with TDA1541, but it is a bit out of it's depth nowadays.

There was a recent set of posts on re-clocking the DEM oscillator with a circuit from Philips. This could be applied here, though a divider from bck may be needed, as 1.5MHz may be a little fast if we sync to BCK and WCK is on the slow side.



Yes, I am sure it has the core qualities that make these old Philips chips so interesting. It will lack some refinement, detail and soundstage expansion. Personally I could probably be quite happy with it, with some minimal tweaking.

Ciao T
T , what value of SCHOTTKY would you recommend , when replacing the bog standard diodes?
 
Hi Thorsten,
This is a straightforward variation on my original design, the CCS with cascoded 317 is a little cute, HOWEVER the most crucial analog supply of the TDA1541A is left using a 317 as regulator! On the plus side, each of the 5 Voltages on the board has it's own winding and power supply section fully seperate, but the rectifiers listed in the page you linked are generic, not schottky, changing them to schottky types may be a good. However, changing the 317's on the -15V supply to LT1085 should be first order of business, if not changing to TL431 shunt and CCS.
Well, in fact the schematis is a bit outdated, while my board came with a bunch of AMS 1086CT-regulators instead of 317.

While there is a solid and even sensibly split (at first blush anyway) groundplane, the decoupling is usual chinese audiophile BS with through hole film cap's where one really wants to see SMD...
To get a look on the downside of the pcb: TDA1541(DALE version)DAC - $255.00 : hifidiy.net, somewhere half the page.

Best get a replacement PCB with CS8414 and use extra decoupling using SMD ceramic caps on that Adapter PCB, it helps a lot. Or change to using a WM8805 based board or Async USB.
And again, my board already came with a small version of the CS8414 on an adapterboard. Apparently there is some positive development in chinese kits :) But nevertheless, my plan is to bypass the complete receiver by connecting my transport directly to the TDA via I2S in order to keep the signalpath as simple as possible.

I would also have a look if there is a nice solid groundplane below the TDA1541 and if so get a bunch of SMD Film Cap's and place them at the decoupling and PSU pin's (you can leave what is already fitted in place).
Yes, I'm planning to construct something like John did in order to get the shortest possible connections. At the moment decoupling is far from ideal, while I soldered in my unwisdom (don't laugh) a pile of 100 nF Russian Pio's (K42Y).

Overall it is actually fairly decent, with much less foolishness and outright "defective by design - which was copied unquestioning of some internet post that was translated with babelfish and comply misunderstood" than common with chinese kits.
Exactly my reason to purchase this kit. Quite simple layout without too much nonsense :)

There was a recent set of posts on re-clocking the DEM oscillator with a circuit from Philips. This could be applied here, though a divider from bck may be needed, as 1.5MHz may be a little fast if we sync to BCK and WCK is on the slow side.
I don't know the Philipscircuit, but I was thinking of applying John's construction in the future. It's quite easy to build and, according to John, it has the best result. Well, I will see some time.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.