any digital leads crossing analog leads or ps leads ? (if so and just a 2 side pcb with contigous plane : a simple hole to solder a wire to go to 3D design or staking are sometimes better... DIY it is : Mr T. advise !)
@ Peterma :about the AYA 2: would you like to manage a little asking list for as you showed encouragement sooner
: something simple for people are able to see the Pedja offer..... Pleaaaaaaaaaaase. Sharing is the way to go...
@ Peterma :about the AYA 2: would you like to manage a little asking list for as you showed encouragement sooner
: something simple for people are able to see the Pedja offer..... Pleaaaaaaaaaaase. Sharing is the way to go...Hi,
Im using the CEN IV, which is a current conveyor with passive IV conversion, there is a thread about it:
http://www.diyaudio.com/forums/digital-source/195483-zen-cen-sen-evolution-minimalistic-iv-converter.html
The FIFO improves the quality by quite a big margin, but it has more to do with the quality of the clock - Crystek 957 is the one im using. But any other crystal with low phase noise is what you want to go for.
And also the I2S signals to the 1541 need the ground return as close as possible to the I2S lines, this is why U.FL conectors are the best choice for interconnection.
My understanding Between two chips I2S complete line (PCB + wire) shouldn't be longer than 10 cm... these length is often writed...as a maximum or I2S could ne worse than a SPIDF with hardware management (crystal). But I don't understand anything to RF...
If NOS design : no crystal on the core board so short I2S needed absolutly ? Am i correct ?
It's main for the clock line than the 2 others if no master clock or FIFO. As the TDA1541 is less sensible to jitter (abraxalito inputs) maybe 10 cm with UFL could match. the pcb just needs maybe : tda pin : then pcbs leads for serie resistor then UFL connector. And the shorter UFL wires... Of course contigous gnd between the leads, the chip & the UFL wires. The ones provided with the Ian FIFO but maybe the FIFO avoid such problems and allow bigger wires !
Ideal should be UFL + holes for DIY in a GSGSGSG arrangement for a flat wire (and not GSSS : no utilty= bad) , but sure UFL are more SOTA I surmise...
For -15, +5V, -5V , decoupling cap for both polymer (2.5 pitch) and smd (605 case) near the pins, at least the last one (smd) ?
For no SMD and I surmise a better result and more sharing friendly: http://www.diyaudio.com/forums/digi...any-good-tda1541a-dac-kit-92.html#post3903524 : Nobody for managing the demands list ?
If NOS design : no crystal on the core board so short I2S needed absolutly ? Am i correct ?
It's main for the clock line than the 2 others if no master clock or FIFO. As the TDA1541 is less sensible to jitter (abraxalito inputs) maybe 10 cm with UFL could match. the pcb just needs maybe : tda pin : then pcbs leads for serie resistor then UFL connector. And the shorter UFL wires... Of course contigous gnd between the leads, the chip & the UFL wires. The ones provided with the Ian FIFO but maybe the FIFO avoid such problems and allow bigger wires !
Ideal should be UFL + holes for DIY in a GSGSGSG arrangement for a flat wire (and not GSSS : no utilty= bad) , but sure UFL are more SOTA I surmise...
For -15, +5V, -5V , decoupling cap for both polymer (2.5 pitch) and smd (605 case) near the pins, at least the last one (smd) ?
For no SMD and I surmise a better result and more sharing friendly: http://www.diyaudio.com/forums/digi...any-good-tda1541a-dac-kit-92.html#post3903524 : Nobody for managing the demands list ?
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Actually Ryan's dac is simple and elegant too!!
Looks very promising as well
Thanks,
In this configuration to my ears it sounds great but I cant guarantee that it will measure well as im certainly no electrical engineer. But the grounding layout is very similar to a lot of good well known designs (ecdesigns).
AudioLapDance, im not overly keen on putting regular pin headers for I2S inputs because it will compromise the signal itegrity and upset the U.FL configuration, which is by far the optimal way to keep the signal as close as possible to the ground return - an essential digital design parameter.
I could add a pin header for the analog output, I wonder if a U.FL connector would be good in this position? To keep as little impedance on the output up to a very high bandwidth? hmmm.
Of course Ufl alone first if both with holes are impossible.
Short ufl wires has to be sourced. Could be problematic for spidf commetcial board or usb amareno.
But nowadays we must go with ufl...because we know and the level has to be increase against the bad kit..
Maybe ask to Marce, he's a gentleman with alxays didactic inputs.
Short ufl wires has to be sourced. Could be problematic for spidf commetcial board or usb amareno.
But nowadays we must go with ufl...because we know and the level has to be increase against the bad kit..
Maybe ask to Marce, he's a gentleman with alxays didactic inputs.
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The way I'm using pin headers is each signal is backed by GND and about 1 cm (CS8412) or 2 cm (USB to I2S) from the chip producing the I2S to the pin header. Then 1 cm through the connected header/footer and then ... what 2 cm on your PCB to the 1541 ... Toight!
I am in touch with Pedja now and will post once I have more information on pricing and description on both choices. (Then Mr. Eldam we need your help to set up a GB if this option is good here
More later.
Hi CFT,
Would Pedja be open to providing just the tda1541 section as found on AYA2,3 including only;
WS, BCK, Both DATA L & R inputs to the chip via uFL (and also GSGSGSGSG if possible).
Provision to connect (trace with solder pad)DATA L/R, and same for pin 27 to 26 or ground (user can select I2S or PCM operation)
The three power supplies for the 1541A including SMD bypasses
Thru hole at 16, 17 (use cap or connect own DEM cct)
SMD decoupling caps as per.
Thru hole for analog outputs direct from chip.
The USB section uses an older receiver that is not really up to date, and the output stage might not be to enough peoples liking to get the numbers required. This would reduce the size and complexity of the board, keeps it toight like a toiger!
, and reduces power transformer requirements to 3 windings and not seven which would make quite straight forward for people to find something suitable (custom probably) from a local source, and lighter for shipping purposes otherwise. Regards,
Shane
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Hi RynaJ,
What news ? Did you ask some helps to Marce fellow to show him your layout (your picture) and had hints ?
Do we can use jumpers with wire and through holes to avoid bad crossing leads if not 4 layers pcbs ? (T. Loesch adive about making 3D pcbs when DIY: look is not importanty but the result for the diyer !)
I'm sure he is able to give few very usefull and see in a look problems who need to be avoid on your pcbs : lookt at the good hints he gave on the AD1862 thread.
But this is your work... your the boss of course ! thank you for sharing.
advert moment : https://www.google.fr/url?sa=t&rct=...7_mv3ZCYQj-f0_P1_5TwIwQ&bvm=bv.65397613,d.d2k : the TDA1541's guys : how to recognise the goodwilled fellows for the new TDA project!
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Thank you for coming Badrisuper,
Maybe help yourself and organise a thread with a demand list to have a number of pre demands for option 1 or 2 to encourage Pedja will be a more intteresting input.
Do you think folks i'm gonna do everythings alone... this is a collaborative story.
GrupBuy option will maybe exist if people want it (here just three demands...lake of visibility; need its own thread !)
Collaborative kit : continue here with the will of their father (VanoFonk,Set3up, RyanJ) and the technical inputs or concrete ideas (merging to a plateform, converting files) of maximum people for helpfull hints.... the rest and free demands are just unusefull !
for the moment only one PCB is avaliable (Vano), and the screen boards or shematic of the two others.
I think there are less than 10 guys goodwilled & motived here, rest of readers are on the Bystander effect wrong side !
Now the results without more inputs is more near than this : talking about the futur of the TDA1541 in family but not with the same goal : https://www.google.fr/url?q=http://...twIwAA&usg=AFQjCNFOnLlBrKrjnPtpfKWMN9s3bvxlWg
Maybe help yourself and organise a thread with a demand list to have a number of pre demands for option 1 or 2 to encourage Pedja will be a more intteresting input.
Do you think folks i'm gonna do everythings alone... this is a collaborative story.
GrupBuy option will maybe exist if people want it (here just three demands...lake of visibility; need its own thread !)
Collaborative kit : continue here with the will of their father (VanoFonk,Set3up, RyanJ) and the technical inputs or concrete ideas (merging to a plateform, converting files) of maximum people for helpfull hints.... the rest and free demands are just unusefull !
for the moment only one PCB is avaliable (Vano), and the screen boards or shematic of the two others.
I think there are less than 10 guys goodwilled & motived here, rest of readers are on the Bystander effect wrong side !
Now the results without more inputs is more near than this : talking about the futur of the TDA1541 in family but not with the same goal : https://www.google.fr/url?q=http://...twIwAA&usg=AFQjCNFOnLlBrKrjnPtpfKWMN9s3bvxlWg
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Member
Joined 2006
Hi ryanj,
I would very curious if you could try my custom Laptech crystal in your setup. I'll surely give a try, but at this moment I don't own a 1541 board to to test my idea, and I'm busy working on the tube output stage.
As I said above I believe the best way is thinking to a system around the TDA1541A. You own almost all the ingredients, the source, the 1541 board and Ian's Fifo buffer. I think you could improve your setup slaving the ASRC (Fifo buffer) from DAC bit clock. To do that you should have a very good master clock to feed directly the BCK of the DAC at 5.6448 MHz, you should remove the reclocking section of the Fifo buffer, and send back the MCLK to the Fifo Main board, that now should run at 128fs (the 1541 will discard any exceeding data).
As I said I have some oscillator boards to fit the crystal. The only problem is I don't own a crystal at such frequency (5.6448MHz), and Laptech accept order for a minimum of 10 pcs, al least 5 pcs for each frequency.
If anyone was interested in the crystal, I could ask Laptech for a quote.
I start the list of interest:
- andrea_mori 2 x 5.6448MHz + 2 x 11.2896MHz
Please, let me know if anyone is interested (also those you have sent me a PM about the Laptech crystal).
Andrea
Andrea
If such a need it means a crystal on the board then a ufl connector to send back to the Ian board ? Correct?
Why not stay nos and only change the crystal on the Fiffo? Sending click data stays problematic in any direction, a problem is solved but an another one is created ? Sendind back a signal clock via a long ufl wire.
Where am i wrong?
For more parts we need to own a mother core board...how do you test without it...only with a scope but no ears test?
Sorry if my understanding seems low. Anyway is it grup friendly: expensive because ian's fifos...
do not we need a final design and pcb to have sharing dynamic and max people to print a pcb, then thinking to more exclusiv design? Is it possible to have a space on the board for crystal but with a cuted lead for a zero ohm jumper to use it or not.
max people is better to print a clean pcb at the lower cost for a maximum people enjoy...
RyanJ?
regards
Eldam
If such a need it means a crystal on the board then a ufl connector to send back to the Ian board ? Correct?
Why not stay nos and only change the crystal on the Fiffo? Sending click data stays problematic in any direction, a problem is solved but an another one is created ? Sendind back a signal clock via a long ufl wire.
Where am i wrong?
For more parts we need to own a mother core board...how do you test without it...only with a scope but no ears test?
Sorry if my understanding seems low. Anyway is it grup friendly: expensive because ian's fifos...
do not we need a final design and pcb to have sharing dynamic and max people to print a pcb, then thinking to more exclusiv design? Is it possible to have a space on the board for crystal but with a cuted lead for a zero ohm jumper to use it or not.
max people is better to print a clean pcb at the lower cost for a maximum people enjoy...
RyanJ?
regards
Eldam
Hi RynaJ,
What news ? Did you ask some helps to Marce fellow to show him your layout (your picture) and had hints ?
Do we can use jumpers with wire and through holes to avoid bad crossing leads if not 4 layers pcbs ? (T. Loesch adive about making 3D pcbs when DIY: look is not importanty but the result for the diyer !)
I'm sure he is able to give few very usefull and see in a look problems who need to be avoid on your pcbs : lookt at the good hints he gave on the AD1862 thread.
But this is your work... your the boss of course ! thank you for sharing.
advert moment : https://www.google.fr/url?sa=t&rct=...7_mv3ZCYQj-f0_P1_5TwIwQ&bvm=bv.65397613,d.d2k : the TDA1541's guys : how to recognise the goodwilled fellows for the new TDA project!
Hello!
Been enjoying myself drinking beer and listening to music this long weekend, so haven't enquired to Marce yet, but will soon as i know he is a digital expert. Hopefully he has the time to look and comment on my amature design!
So ill get back to you on that one soon.
Hi Andrea,
I total agree that directly sending the 1541A 5.6448Mhz with lowest phase noise for bck would be the best solution. But just one question about sending the signal back to fifo main board - The minimum frequency to be used is 22.5792Mhz, which is the frequency im running the fifo at. So how would we get around this? Can you get the Laptech crystals in that frequency? The QA550 could be slaved at 11.2896. So I could remove the fifo altogether.
best sain priority people can have....and good weather in your country those days. Take your time, enjoying life is a priority. I try just to keep this uthopic project alive, unhappilly think we are too few to be active (not you)... so sometimes i make (write) Chubacka noise !Have myself practice the same but with wine, rediscover Breakfast in America by Supertramp (have enough DAC to live with for me and the family), do some cap test to setup a DAC for my own taste...& find a little time to post two videos on this thread
, and listening a Ben Webster as icing on the cake...Crysteks 957 are limited to 22.xx as you suggest but you should be able to use 11.2896MHz with that board. Trouble as I understand is finding a decent 11.29MHz clock as a plug-in solution. Halving that again.. I see that you're at 5.6xxmHz with 128fs and 44.1kHz, but the benefits - I dunno.
Andrea, have you tried Ians XO board with his FIFO and the tda1541A? in other words help us better understand your suggestion. I remember reading through some threads that you contributed to that were contributed to by J. Homo, and I remain unconvinced of the approach (love and kisses).
Special Hi to Chewbakka.. might be time to fire up the Millennium Falcon… "what do you mean the overdrive won't work>????"
Regards,
Shane
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