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Old 26th May 2013, 08:49 PM   #541
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Join Date: Apr 2007
Quote:
Originally Posted by ThorstenL View Post
Folks,

Okay, lets do some analysis of the kit from pictures, shall we?

So the WM8805 section will work after a fashion, but there is no way it is ever going to offer anything like the phase-noise / jitter levels the WM8805 is capable of. In fact, I think despite all it's shortcomings, a well applied Cirrus Logic CS-8412/14 will have lower jitter.

CAVEAT EMPTOR MONITUS ES

Ciao T
Hello

Can you tell me more about what to do to have the Cirrus Logic CS-8414 to have lower jitter.

Thank

Bye

Gaetan
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Old 27th May 2013, 01:37 AM   #542
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T doesn't post here, he's over at another place.

Here's T's hints concerning the 1541. He has a CS8412

DAC build TDA1541A/SAA7220P/B *will take som time*

In particular, this post shows what T did to his 8412

Any good TDA1541A DAC kit?

Cheers my amis Quebecois!
Jeff
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Old 27th May 2013, 02:15 AM   #543
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i noticed that in his pic he has the cover of the coupling cap removed. must be a sensible practice. the cap looks like a solen?
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Old 12th August 2013, 08:05 AM   #544
vzs is offline vzs  Europe
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Quote:
Originally Posted by s3tup View Post
...But kinda preview of what i have...


And again, i decided to go with CPLD on digital end to get more control on clocking, I2S etc.

What i want to do is feed the TDA in simultaneous mode. I'll halve the clock rates - therefore less disturbances, and ability to go 8x oversampling.

In addition, going CPLD brings possibility to use dufferent DF ICs which aren't compatible with 1541 by default. There are many nice DFs around which were no-no for 1541 due to their high BCLK rates.

I want to implement advanced clocking scheme, which will give ability to
- Slave/Master operation of SPDIF receiver
- OS/NOS operation
- Support of Hi-Rez 88.2, 96, 172.4, 192kHz formats falling back to NOS with DF bypass.

Moreover, dual-differential mode with two TDAs becomes possible as CPLD could split/invert the i2s to L+,L-, R+,R- signals, and pack each channel pair to single I2S line (or even simultaneous way).

That will require 2's compliment to binary offset conversions etc. The VHDL thing is pretty neat and new for me, and i like it. Tiny power, tiny footprint, flexibility and "hardcoded" design. I've already coded i2s inverter with two 32-bit arrays (shiftregs in hardware).


In addition, to futher reduce digital noise on DAC board, the reclocker should work with 3.3v levels - we don't need the 5v swing anyways, and working with 3.3v both reduces voltage swing, and slows down slew rate.
And best of all, the clock driver could be 5v, but with series-paralel termination dividing the signal in half, and bringing down the logic levels to 3.3v CMOS-compatible, with no reflections on either ends of transmission line.

The problem is... I have one quad DFF on the DAC for reclocking, but need to reclock 5 signals (data_L, data_R, BCLK, LRCLK, DEM_CLK). Argh, a bit on the FAIL side. Is there any TinyLogic (or comparable) DFFs which both have slow slew rates and differential outputs? I hate going the octal DFF ICs without differential outputs just to have an possibility to go simultaneous mode...
Hi s3tup,

Did something materialized out of your project?
I'm testing Ian's I2S-PCM driver board with an AD1865 DAC and looking to try out TDA1541A as many are praising it but couldn't find any good designed commercial kits (allover through-hole components, bad or no ground-plane...).

A similar CPLD board you mention is actually Ian's I2S-PCM driver board. Since the latest version it has half-speed mode and TDA1541A was proved to work at 352.8KHz (384KHz not tested yet) in simultaneous mode with great success.

As far as DF/upsampling is concerned why not use software instead - e.g. SoX? I'm using Amanero Combo connected to a PC with LMS + Squeezelite to go 8x... waiting for my Wandboard to build an all-in-one player based on Community Squeeze Operating System

Thanks,
Zsolt
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Old 13th August 2013, 07:01 AM   #545
regal is offline regal  United States
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Quote:
Originally Posted by vzs View Post
Hi s3tup,



As far as DF/upsampling is concerned why not use software instead - e.g. SoX? I'm using Amanero Combo connected to a PC with LMS + Squeezelite to go 8x... waiting for my Wandboard to build an all-in-one player based on Community Squeeze Operating System

Thanks,
Zsolt
O the PC real time upsampling with Foobar seems limited, Sox features are small and no 64 bit apodizing. With the PC Sygnalyst has the better real time upsampling but is missing an important plugin (HDCD.)
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Old 13th August 2013, 10:42 AM   #546
vzs is offline vzs  Europe
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Quote:
Originally Posted by regal View Post
O the PC real time upsampling with Foobar seems limited, Sox features are small and no 64 bit apodizing. With the PC Sygnalyst has the better real time upsampling but is missing an important plugin (HDCD.)
Here's a try for Meridian like apodizing with SoX.
I don't use Foobar but Squezeelite. Its configuration explained here: Upsampling Impressions ... give it a try, you might like it.

For the sake of testing you can upsample offline with SoX and have all its settings at your hand. With the same filter for both SoX and Signalyst I would be curious about the results.
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Old 30th December 2013, 10:46 PM   #547
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Any news about Thorsten's output stage PCB?
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Old 31st December 2013, 09:32 AM   #548
Ceglar is offline Ceglar  Australia
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I've built the stage and can confirm that it works well.

As for PCB, you're meaning the commercial offerings of the same by both diyhifisupply.com and parts connexion.com? ??


Regards,
Shane
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Old 31st December 2013, 09:37 AM   #549
Ceglar is offline Ceglar  Australia
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Quote:
Originally Posted by vzs View Post
Hi s3tup,

Did something materialized out of your project?
I'm testing Ian's I2S-PCM driver board with an AD1865 DAC and looking to try out TDA1541A as many are praising it but couldn't find any good designed commercial kits (allover through-hole components, bad or no ground-plane...).

A similar CPLD board you mention is actually Ian's I2S-PCM driver board. Since the latest version it has half-speed mode and TDA1541A was proved to work at 352.8KHz (384KHz not tested yet) in simultaneous mode with great success.

As far as DF/upsampling is concerned why not use software instead - e.g. SoX? I'm using Amanero Combo connected to a PC with LMS + Squeezelite to go 8x... waiting for my Wandboard to build an all-in-one player based on Community Squeeze Operating System

Thanks,
Zsolt
Zsolt,

Have you confirmed 352kHz up sampled real time via PC with Ians Dual XO driving 1541A via his PCM board?.

Regards,
Shane
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Old 31st December 2013, 01:41 PM   #550
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Location: Italy
Quote:
Originally Posted by Ceglar View Post
I've built the stage and can confirm that it works well.

As for PCB, you're meaning the commercial offerings of the same by both diyhifisupply.com and parts connexion.com? ??


Regards,
Shane
No, they used anode CCS, while I would use anode chokes as in the original Thorsten's 2005 schematic.
I meant the PCB from vanofmonks in post #479 or similar compliant with T's schematic.
However, how did you build it? did you get a pcb or what else?

SInce I'm planning to build T. output stage for myself, if there was interest we could design a PCB. Let me know if other members are interested.
If yes, starting from the anode choke mode, let me know what you think about:
- one E88CC/6DJ8/6922 or two E180F triode strapped
- chokes on the pcb or not (if yes we have to decide which one)
- B+ on the PCB or not (if yes regulated or unregulated)
- heaters supply on the PCB or not (AC, unregulated DC or regulated DC)
- output caps on the PCB or not (if yes we have to decide about footprint)

Andrea
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