Any good TDA1541A DAC kit? - Page 101 - diyAudio
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Old 7th May 2014, 12:00 PM   #1001
ryanj is offline ryanj  Australia
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Thanks guys,

Just one thing to mention, AOL (pin 25) current return will need a wire jumper, shouldn't be too much of an issue, i think its a better compromise than routing it all the way around.
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Old 7th May 2014, 12:07 PM   #1002
Jaffrie is offline Jaffrie  Indonesia
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one thing about soldering the smds directly to the chip. If it's not working you have to start all over on another chip. Besides one can't be sure if
chip is functioning if you can't swap chips to verify.
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Old 7th May 2014, 12:12 PM   #1003
ryanj is offline ryanj  Australia
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Quote:
Originally Posted by Jaffrie View Post
one thing about soldering the smds directly to the chip. If it's not working you have to start all over on another chip. Besides one can't be sure if
chip is functioning if you can't swap chips to verify.
I agree, much too inconvenient. Just wanted to show the preferred layout for the reputable ECdesigns.
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Old 7th May 2014, 12:47 PM   #1004
Jaffrie is offline Jaffrie  Indonesia
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I have amass something like 15 chips or so over the years but never had the time to build. I've been very lucky that I managed to buy 9 S1 chips & I send 2 pcs to Lesha who tells me that it does sounds better than the stock 1541A & wow that was like many moons ago. lol
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Old 7th May 2014, 12:52 PM   #1005
PET-240 is offline PET-240  Australia
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Ryanj,

Might I ask a silly question around the ground returns to the chip from the decoupling caps, made a drawing and took a foto I did, https://www.dropbox.com/s/i1xuaenyn1...2021.47.18.jpg
Can you have a geezer and tell me why it couldnt be done this way please?

Chuz,

Drew.
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Old 7th May 2014, 02:11 PM   #1006
ryanj is offline ryanj  Australia
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Quote:
Originally Posted by PET-240 View Post
Ryanj,

Might I ask a silly question around the ground returns to the chip from the decoupling caps, made a drawing and took a foto I did, https://www.dropbox.com/s/i1xuaenyn1...2021.47.18.jpg
Can you have a geezer and tell me why it couldnt be done this way please?

Chuz,

Drew.
Hi Drew,

After following ecdesigns thread for so long I think i just came to accept that this is the best way to route the analog return currents - I think his reasoning was to keep them separate for as long as possible so not to interfere with one another.

The layout in my Rotel RCD 855 is also very similar to this.
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Old 7th May 2014, 03:36 PM   #1007
marce is offline marce  United Kingdom
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Originally Posted by PET-240 View Post
Also a question, under the I2S traces on the other side of the board should there be no earth plane to reduce capacitance as well?
There must be a contiguous gnd plane under these tracks....
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Old 7th May 2014, 03:37 PM   #1008
marce is offline marce  United Kingdom
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Originally Posted by Ceglar View Post
Its way beyond my simple understanding, but is the inductance of the vias a concern, or just need to be taken into account?.
Don't worry about this at these speeds, not an issue.

Trying to catch up with everything, had a few days away from the computer, so millions of e-mails etc
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Old 7th May 2014, 03:46 PM   #1009
marce is offline marce  United Kingdom
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Originally Posted by PET-240 View Post
Ceglar,

I think it is the impedance we need to be concerned about, as I understand it, that can affect rise and fall times and the attenuation of the square wave causing ringing and the like.

I could be wrong.....

Chuz,

Drew.
Without going to deep into signal integrity, as there are many such as Howard Johnson and Eric Bogatin who's written works are an excellent reference but:
When a devices switches it sees the immediate impedance at the bond wire, then the chip leg, then the first bit of trace. Quite often chips drive capacity is stronger than required (fast rise time, strong current delivery) this excess energy is put into the line and cannot be totally absorbed by the receiver device, so this excess energy reflects back along the line. That is basically what ringing is, it is usually not to serious and most modern digital circuits have some lines that have ringing. The way to combat this is either series resistor right next to the driving gate ( any distance makes this resistor pointless) this will slow the rise time and limit the HF energy being put into the line, or some sort of parallel termination next to the receiver gate, this can be a resistor to GND or VCC, or a resistor with a cap, often a better choice as you can tune it to the line and not have your switching levels change.
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Old 7th May 2014, 04:06 PM   #1010
marce is offline marce  United Kingdom
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Quote:
Originally Posted by Eldam View Post

I will say here before Ryan loose time we need testimonies about the ground loops and the gnd pins and powers pins of the chips ? Set3up ? Anybody else experienced who read this thread ? Question to ECdesigns in his thread ? (But I'm the first to think than too much people ask too much to John with 2 cents questions...).

Eldam
Don't think of ground loops on a PCB, it is not an issue on these sort of designs, high power designs occasionally may have a problem. Think of every signal as a pair with a pos and neg leg.
Look at this and how the signals return to get an idea what you should be visualising, not ground loops. That said if you split ground planes between analogue and digital (most recommend you don't) the thing to watch out for is creating a high impedance where the two grounds connect, this can cause one GND to be at a different potential to the other, this will cause problems and in some cases you can loose some bottom bits in the noise. There's a good TI paper on this.

http://www.x2y.com/filters/TechDay09...%20_JohnWu.pdf

And here is I think the TI paper:
http://www.ti.com/lit/ml/slyp167/slyp167.pdf
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