Open Source DSP XOs - Page 54 - diyAudio
Go Back   Home > Forums > Source & Line > Digital Line Level

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 12th November 2013, 07:38 PM   #531
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
Found also this cheap LPC4337 board, too bad it's got the old fashioned JTAG connector (got to buy an expensive adapter to get it working with LPCLink2):

LPC MCU board | Cortex-M4 | Core4337
  Reply With Quote
Old 14th November 2013, 08:22 AM   #532
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
BTW. If you think LPC43xx is too complicated environment as a dualcore one then why not just to use only the M4 core for everything? It's still faster than many other M4s around. You can get the I2S with DMA running easily using the examples available, and the SGPIO setup quite easily. Then later when you want to have like an USB interface to PC for loading a new filter kernel or a set of coefficients then implement the interface on the M0 core.
  Reply With Quote
Old 15th November 2013, 08:26 PM   #533
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
Anybody studied LpcLink2 schematics? It uses the SGPIO interface for implementing the JTAG functionality. Also it's configurable, it means programmable, so you can load your own code to it using the LPC-Link2 Configuration Tool (LPC-Link 2 configuration tool | www.LPCware.com) - or by using another LpcLink2 board as it seems the J2 socket is connected directly to JTAG pins of the LPC4370 on board. So you could also program it to run your crossover stuff and use the SGPIO to connect to your audio converters. So it IS a development board after all.

Got to order another LPC-Link2 to see how it works...

Last edited by mhelin; 15th November 2013 at 08:49 PM.
  Reply With Quote
Old 15th November 2013, 08:41 PM   #534
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
See LPC4370 microcontroller and LabTool for high performance data acquisition | www.LPCware.com

LPC-Link 2 is an extensible, stand-alone debug probe that can be configured to support various development tools and IDEs using a variety of different downloadable firmware images. It can also be used as an evaluation board in its own right for the NXP LPC4370 triple core MCU. And through the use of an add-on board from Embedded Artists, it can be used as an oscilloscope or logic analyzer!


Here's the 99EUR (including LPC-Link2) 11 channel logic analyzer (up to 100Msamples per second) + 2 channel oscilloscope (up to 80 Msamples per second, 6MHz BW) + 11 channel digital signal generator (up to 80 Msamples per second) +2 channel analog signal generator (40kHz BW) board:

LabTool | Embedded Artists AB

Instead of LabTool board I'd like to see an audio interface board with multichannel DACs, an ADC and an S/PDIF receiver with a sample rate converter.

Last edited by mhelin; 15th November 2013 at 08:47 PM.
  Reply With Quote
Old 15th November 2013, 09:22 PM   #535
diyAudio Member
 
Join Date: Jun 2009
Try page 49 of this thread.

Oh, speaking of cape type add on boards, here's a writeup of using the I2S out on the BeagleBone Black to drive a stereo DAC. Might be of general interest to the folks on this thread.

Last edited by twest820; 15th November 2013 at 09:29 PM.
  Reply With Quote
Old 16th November 2013, 10:54 AM   #536
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
Quote:
Originally Posted by twest820 View Post
Try page 49 of this thread.
Quote:
TRACEDATA pins on J8 are only available as SGPIOs if you hack the debug connector to 10 pin Cortex from 20 pin JTAG.
I think there's no need to hack anything as the 10 pin Cortex connector is what can be used anyway if you use another LPC-Link2 to program the target one (connection is from J7 in debugger to J2 in target socket). If you already have a JTAG debugger with the 20-pin socket there are adapters available (from Ebay at leas Olimex is selling one for few euros).

J8 can be made to transfer four I2S data outputs (TRACEDATA0..3) and one input (JTAG_TMS_SWDIO, requires just moving the SGPIO15 (to be reserved for generating DMA trigger pulse) to pin C6 (BOOT2, guess it's used after boot) out of way of the GPIO pin going to J4 to control direction for SGPIO14), rest of pins can be used for clocks (haven't check though, those are connected to SGPIO10, SGPIO11 and SGPIO12) and the J3 (Serial Expansion) can be used to control converters over I2C, UART might be useful for programming coefficients and as general UI.

I think it looks pretty good and clean to me. Got to check yet if MCLK input would be possible - maybe if JTAG_TCK_SWCLK and JTAG_TDI (SGPIO11 and SGPIO12) are used as MCLK and BCLK. The proper slave mode with SPGIO might be impossible, you would need to configure the LRCK input pins for pattern matching and then in interrupt service routine copy the data from the shadow register to memory buffer assuming the counter has reached zero at this point and the REG and REG_SS have been swapped for that slice.

E: JTAG_TDI = SGPIO12 can be used as clock source (MCLK output/input) but the TAG_TCK_SWCLK cannot be used as BLCK output at the same time if MCLK is input (unless you remove U3 8-pin chip and jumper pins 2->7 and 3->6 which is easy though as the pins are opposite pins, but it's a hack anyway). Anyway, there should be no problems using master mode - maybe there are other ways to input MCLK to generate BCLK and LRCK from it.

Last edited by mhelin; 16th November 2013 at 11:13 AM.
  Reply With Quote
Old 16th November 2013, 02:07 PM   #537
diyAudio Member
 
Join Date: Jun 2009
You're right. I'd somehow failed to register J7. Dang. Facepalm.

J3 would presumably be in use for I2C and at least a reset line to the codec or DAC. It conveniently happens the LPC-Link 2 pins SSP1_SCK out on PF_4, which is also GP_CLKIN, and SSP1_SEL is pinned to P1_20, which is also SGPIO13. So, without overloading any JTAG pins shared with J7, J3 plus J8 offers a slave MCLK and six SGPIOs in addition to I2C and 8 GPIOs.

A limitation of using J8 is the T junction introduced on the JTAG lines. One issue its effect on signal integrity. If the ribbon's short, trimmed, or a 10 pin ribbon happens to fit on the high pins J8 (at 50 mils probably not likely unless one sands down the connector) that's easy enough to avoid. A bigger problem with picking up SGPIO12 via JTAG_TDI is the recipient of that line will see debug traffic as I2S. So it would be preferable to use it as a data output from the LPC4300 to avoid strange clocking and contention between the debugger and an audio device driving the line. It's difficult to guarantee a clean transition to an input when entering debug such that no contention would occur between the LPC4300 and debugger.

If a seventh SGPIO line is needed a more reliable and easier approach would be to take SGPIO9 from J4.

However, with the exception of accessing SGPIO13 from J3, all SGPIOs route through U4 and therefore go in the same direction. So using the LPC-Link 2 for XO and EQ with an I2S input requires lifting at least some of the pins on U4. I find this an odd design choice as it would seem to significantly increase the probability of users needing to hack the board. For asynchronous USB input it does look pretty turnkey as all SGPIOs can be outputs with MCLK brought in from J3---up to triamp from J8 with three I2S lines and quadamp with J3.

As an aside, U3's direction pin is brought out to J4 along with U4's direction pin. So use of TAG_TCK_SWCLK doesn't require removing U3. It just has all the same problems as trying to use JTAG_TDI for SGPIO.

Last edited by twest820; 16th November 2013 at 02:35 PM.
  Reply With Quote
Old 17th November 2013, 03:03 PM   #538
diyAudio Member
 
Join Date: Apr 2003
Location: Tampere Finland Europe
Quote:
Originally Posted by twest820 View Post
You're right. I'd somehow failed to register J7. Dang. Facepalm.

J3 would presumably be in use for I2C and at least a reset line to the codec or DAC. It conveniently happens the LPC-Link 2 pins SSP1_SCK out on PF_4, which is also GP_CLKIN, and SSP1_SEL is pinned to P1_20, which is also SGPIO13. So, without overloading any JTAG pins shared with J7, J3 plus J8 offers a slave MCLK and six SGPIOs in addition to I2C and 8 GPIOs.

A limitation of using J8 is the T junction introduced on the JTAG lines. One issue its effect on signal integrity. If the ribbon's short, trimmed, or a 10 pin ribbon happens to fit on the high pins J8 (at 50 mils probably not likely unless one sands down the connector) that's easy enough to avoid. A bigger problem with picking up SGPIO12 via JTAG_TDI is the recipient of that line will see debug traffic as I2S. So it would be preferable to use it as a data output from the LPC4300 to avoid strange clocking and contention between the debugger and an audio device driving the line. It's difficult to guarantee a clean transition to an input when entering debug such that no contention would occur between the LPC4300 and debugger.

If a seventh SGPIO line is needed a more reliable and easier approach would be to take SGPIO9 from J4.

However, with the exception of accessing SGPIO13 from J3, all SGPIOs route through U4 and therefore go in the same direction. So using the LPC-Link 2 for XO and EQ with an I2S input requires lifting at least some of the pins on U4. I find this an odd design choice as it would seem to significantly increase the probability of users needing to hack the board. For asynchronous USB input it does look pretty turnkey as all SGPIOs can be outputs with MCLK brought in from J3---up to triamp from J8 with three I2S lines and quadamp with J3.

As an aside, U3's direction pin is brought out to J4 along with U4's direction pin. So use of TAG_TCK_SWCLK doesn't require removing U3. It just has all the same problems as trying to use JTAG_TDI for SGPIO.

The JTAG_TDI is just a name for that signal in debugger configuration, in target configuration it could be used for anything, in reality it is just SPGIO12 (with some other functions as ENET_TX etc. you can see in PinMux tool). The real JTAG pins are named LPC4370_<JTAG function>, so for an example LPC4370_TDI is the "real" JTAG_TDI. So no problems there.

I'd like to keep J3 connections in just control functions, it is also possible to build a converter board which is hardware configured not needing I2C or anything, and once youve got your crossover ready you really don't need any inteface for uploading coefficients either.

So what would work well for 1xI2S input (well, two inputs one for digital and another for analog might be useful) and 4xI2S ouput could look like this:

I2S_SDI JTAG_TCK_SWCLK (J7, J8) SPGIO11
I2S_MCLK JTAG_TDI (J7, J8) SGPIO12

I2S_SCK JTAG_TMS_SWDIO (J7, J8) SGPIO14

(alternative:
I2S_SCK TRACECLK_RTCK (J8) SGPIO8
I2S_SDI_1 JTAG_TMS_SWDIO (J7, J8) SGPIO14
)

I2S_WS JTAG_TDO_SWO (J7, J8) SGPIO10

I2S_SDO_0 TRACEDATA0 SGPIO0 (J8)
I2S_SDO_1 TRACEDATA1 SGPIO1 (J8)
I2S_SDO_2 TRACEDATA2 SGPIO2 (J8)
I2S_SDO_3 TRACEDATA3 SGPIO3 (J8)


TRACECLK_RTCK is also an output on J8, so the JTAG_TMS_SWDIO could be made another input and TRACECLK_RTCK would become SCK (I2S bit clock).
  Reply With Quote
Old 17th November 2013, 04:35 PM   #539
diyAudio Member
 
Join Date: Jun 2009
Ah, supporting only target and hence having J2 the only connector handling JTAG makes more sense. Thanks for clarifying intent and taking a closer look at the board than I did a few pages ago. I think you'd want something closer to

J8 inputs (direction controlled by DIR_U3 on J8 and P1_5 - SGPIO15_TMS_SWDIO_TXEN)
  • I2S_SCK - JTAG_TMS_SWDIO SGPIO14
  • I2S_SDI - JTAG_TCK_SWCLK SPGIO11
  • I2S_WS - JTAG_TDI SGPIO12
as not having an LRCK would make the receive a little tricky. All codecs I can think of allow SDI to be switched between their ADC and SPDIF receiver so 7400 muxing logic would only be required on "codec" boards implementing the two with separate chips.

I would probably do something like this for the outputs on J8.
  • I2S_SCK - JTAG_TDO_SWO SGPIO10 - needed if SCK not shared between I2Ses on codec board, requires MCLK via J3
  • I2S_WS - TRACECLK_RTCK SGPIO8
  • I2S_SDO_0 - TRACEDATA0 SGPIO0
  • I2S_SDO_1 - TRACEDATA1 SGPIO1
  • I2S_SDO_2 - TRACEDATA2 SGPIO2
  • I2S_SDO_3 - TRACEDATA3 SGPIO3
I'm not finding a manual for the LPC-Link 2 but looks like it ships set to boot from SPIFI flash. EXT_POW enables use of the board without USB plugged in and VIO_3V3Z provides an IO supply for the "codec". So I'm not seeing any reason why this wouldn't work. USD 40 for a pair of LPC-Link 2's from DigiKey or Mouser is tough pricing to beat too.

Also looks like the crystal's an HC-49 so swapping it to an audio clock for master mode execution would be an option. Might not be that clean of an MCLK but it's likely lower phase noise than using the fractional audio PLL.

Last edited by twest820; 17th November 2013 at 04:46 PM.
  Reply With Quote
Old 17th November 2013, 05:29 PM   #540
diyAudio Member
 
Join Date: Jun 2009
One other correction, since only SGPIO8-11 can clock another slice:
  • I2S_SCK - JTAG_TCK_SWCLK SPGIO11
  • I2S_WS - JTAG_TDI SGPIO12
  • I2S_SDI - JTAG_TMS_SWDIO SGPIO14
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Volume / Source selector - open source project ? AuroraB Analog Line Level 22 22nd September 2012 02:21 PM
Violet DSP Evolution - an Open Baffle Project cuibono Multi-Way 211 18th May 2010 02:26 AM
Open call for suggestions on Open Source DIY Audio Design gfergy Everything Else 1 15th April 2007 07:33 AM
Open Source, Open Architecture! zenmasterbrian Digital Source 185 23rd February 2007 10:35 PM


New To Site? Need Help?

All times are GMT. The time now is 10:18 PM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright 1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2