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Old 15th January 2013, 12:29 PM   #381
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Quote:
Originally Posted by steph_tsf View Post
Is the ASUS Xonar H6 2x12pin header specification available ? PCIe 1x only used for DC supply ?
I'll post the pinout when I get home tonight, guess its ok. There is no PCIe connector actually, the card edge looking like it is just used to mount the board, supply is via the header only.
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Old 15th January 2013, 03:23 PM   #382
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Quote:
Originally Posted by mhelin View Post
Now has anyone designed his/her own boards yet?
I think we talked about this around post 365, though not specifically about connector pinouts. ADCs, DACs, codecs, and SPDIF receivers are all I2S sources and sinks, so in all cases I'm aware of board to board interfaces among these and a DSP are I2S into the DSP and I2S out of the DSP. There's kind of a de facto standard of using 100 mil headers for the interconnect to the DSP, though I'm not aware of any case where boards from different manufacturers assign the same I2S lines to the same pins on the header (or even use headers with the same number of pins, now that I think about it).

So, to do what you're proposing, one ends up either building custom ribbon cables for the combinations of interest or building adapter boards to do the same thing. This is no big deal, but it does mean any pinout standard one defines is going to be "wrong" most of the time, unless it happens to take off and become widely supported. To my mind the most interesting pinouts are in the 4x8 space---two I2S lines into the DSP to support switching between a couple sources and four lines out to support four ways---but 2x2, 2x4, 2x6, 2x8, 4x2, 4x4, 4x6, 4x8, and 8x8 are all fairly common (and those are just the variations I can think of people on DIYA using off the top of my head).

Having extra IOs that are unused is better than not exposing IOs that are needed so targeting (more)x(more) seems the preferred default. The LPC4300 has the I2S peripherals and SGPIO slices for two 4x8 interfaces (though I'm not sure about doing both at the same time with independent clocks). It's also useful to pin out I2C, some GPIOs for things like reset, and maybe power and an ADC for a volume pot.

Quote:
Originally Posted by mhelin View Post
I'm not sure if XMC4500 can generate the LRCLK in slave mode
Back when I looked at the part I saw no problem generating the LRCK. But I didn't look all that closely.
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Old 15th January 2013, 07:37 PM   #383
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Here's the pinout of H6 board. The numbering starts from pin 1 of J1 connector but is kind of odd. The pins are numbered from left up pin 1 to left down pin 13 and then the right pins from pin 14 to pin 26 (like opams are numbered):

Code:
======= XONAR HDAV H6 pinout ================
                                      V
 13 12 11 10 09 08 07 06 05 04 03 02 01
(26)25 24 23 22 21 20 19 18 17 16 15 14

01) RST (pcm1796)
02) MDI (pcm1796 right dac), /MS (pcm1796 middle dac), GND
03)
04) GND
05) RELAY ON
06) MDO (pcm1796) = I2C DATA
07) MC (pcm1796) = I2C CLOCK
08) VDD (digital supply 3.3V)
09) VCC  (analog supply 5V)
10) analog/digital ground
11) op amp +ve (+15V)
12)
13) op amp -ve (-15V)

14)
15)
16) MDI (pcm1796 right dac), /MS (pcm1796 middle dac), GND
17) DATA (pcm1796 middle dac)
18) DATA (pcm1796 left dac)
19) DATA (pcm1796 right dac)
20)
21) LRCK (pcm1796)
22) BCK (pcm1796)
23) SCK (pcm1796)
24) GND
25)
26) missing pin

I2C slave addresses
====================

PCM1796 left dac:  /MC=1 (=ADR0),  MDI=1 (=ADR1) => 1001111
PCM1796 middle dac: /MS=0, MDI=1 => 1001110
PCM1796 right dac: /MS=1, MDI=0 => 1001101
Some not connected pins may be conected to ground or should be connected to ground for the sound card to recognize that H6 is present, but it doesn't matter (hopefully) when used standalone.

Last edited by mhelin; 15th January 2013 at 07:41 PM.
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Old 15th January 2013, 10:58 PM   #384
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Yep, standard numbering. Pretty much an expected pinout for a 0x6 interface too.
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Old 17th January 2013, 10:05 AM   #385
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Quote:
Originally Posted by twest820 View Post
I'm using a mix of the 4300's I2S and SGPIO peripherals and the preliminary schematic includes an expansion header with duplex clocking, I2S receive, and the seven SGPIO lines that aren't used for driving the 4365.

So it's not modular per se, but if one wants to patch in an ADC, different multichannel DAC, alternate clock, or pretty much any arbitrary I2S source or sink it's not particularly difficult.
Haven't been able to find an LPC4300 evaluation board with the I2S and SGPIO pins exposed to headers, aren't there really any? The latest Embest/Element14 LPC4357 (builtin flash part) boards either have those pins (they are missing all SGIOP pins too, don't know what they have been thinking when designing those boards). Can't the SGPIO used full duplex? Anyway, there is a new LPC4357 board coming from NGX Tech:
NGX Technologies Online Store

It doesn't need external flash but there is still one chip on board. I think if I remove the flash chip I could take the second I2S port pins from there. Might be difficult depending on package (SOIC should be possible to handle).
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Old 18th January 2013, 02:49 PM   #386
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Btw. STM32F4 has two I2S outputs (has been discussed earlier). However, these are mapped (so to say) to SPI2 and SPI3 (which are working in I2S mode). This leaves SPI1 free, and if I2S LRCLK could be converted to SPI frame syncs happening excactly 16 bits (SCLK's) apart it would be possible with the help of DMA to output data for additional I2S channels 5/6.

The SPI frame is max. 16 bit but in continuous TI SPI mode you just output continuosly data so that it will be eventually output to DAC in correct I2S frame. Don't know what happens if the synchronization with I2S block (interrupts) breaks, anyway if the are started together and synchronized by LRCLK and SCLK there shouldn't be problems. Kind of hack though, but by using DMA it might actually work. One problem is that the SPI sync (NSS pin) occurs during last bit output, so that's one sample before I2S LRCLK transition occurs. However, because in I2S the first bit (MSB) is anyway delayed by one clock it goes as it should. Problem is generating the NSS 16 clocks later (use some counter or flip-flops, not many chips are needed I guess).
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Old 19th January 2013, 01:23 AM   #387
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Quote:
Originally Posted by mhelin View Post
Haven't been able to find an LPC4300 evaluation board with the I2S and SGPIO pins exposed to headers, aren't there really any?
I haven't particularly looked as the BOM cost to solder down an LPC4300 on one of my own boards is comparable to or less than most of the eval boards. Not that I expect to run boards any time soon; still have to get the firmware together and haven't settled on how I want the DSP+DAC board to fit in with its power supply and low/mid power amplifier I want to put in the same chassis.
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Old 22nd January 2013, 01:59 AM   #388
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Quote:
Originally Posted by mhelin View Post
The Infineon XMC4500 Relax Lite kit (which also includes USB debugger) costs only 12.95 EUR on Mouser
Thanks for pointing it, just bought a few from Mouser.

I went digging the XMC4500 Datasheet and XMC4500 Reference Manual, trying to figure what the advertised "6 x I2S" really means :

USIC#0 : U0.C0 (channel 0) and U0.C1 (channel 1)
USIC#1 : U1.C0 (channel 0) and U1.C1 (channel 1)
USIC#2 : U2.C0 (channel 0) and U2.C1 (channel 1)

For connecting a WM8580 containing two ADCs and six DACs, the following lines are needed (viewed from the XMC4500) :

- I2S_data_in1
- I2S_data_out1
- I2S_data_out2
- I2S_data_out3
- I2S_SCLK
- I2S_WS
- I2C_SCL (as control bus)
- I2C_SDA (as control bus)

Can somebody advise me how to assign the USICs on the Infineon XMC4500 Relax Lite kit ?

If such assignment is feasible, I will stop developing for the PIC32MX2, and join the ARM Cortex-M4 bandwagon.
Attached Images
File Type: jpg XMC4500 USIC I2S in Master Mode.jpg (214.1 KB, 115 views)
File Type: jpg XMC4500 USIC I2S in Slave Mode.jpg (168.6 KB, 115 views)
File Type: jpg XMC4500 USIC I2S Connecting Audio Devices.jpg (60.3 KB, 113 views)
File Type: jpg XMC4500 USIC I2S Signals.jpg (79.2 KB, 111 views)
File Type: jpg XMC4500 USIC Data Buffering.jpg (122.4 KB, 96 views)
File Type: jpg XMC4500 USIC Channel IO Lines.jpg (70.7 KB, 22 views)

Last edited by steph_tsf; 22nd January 2013 at 02:04 AM.
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Old 22nd January 2013, 09:43 AM   #389
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The Relax kit board user manual (Infineon Technologies ) shows in figure 6 example of the pin mappings though it is missing data inputs pins. You have to download the XMC4500 Reference Manual and look for the needed pins and deside the mapping you will use (there are usually several alternatives). Manual can be found here:
Infineon Technologies

Unfortunately I wasn't able to find any code examples. Easiest approach would be using DAVE 3 tool, but it seems that I2S application is not yet ready. Basically you has to decide which clocking schemes are available and what you will use (master/slave), set all needed registers for generating the proper clock, setup the DMA and interrupt(s), word and frame size for I2S block and then enable the clock and I2S blocks. Guess DAVE SPI application could be used for setting up DMA and interrupts at least.
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Old 22nd January 2013, 12:31 PM   #390
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Quote:
Originally Posted by steph_tsf View Post
I went digging the XMC4500 Datasheet and XMC4500 Reference Manual, trying to figure what the advertised "6 x I2S" really means.
Reading more than 100 pages, I still don't know what the advertised "6 x I2S" really means. At the moment, I don't care about the pin mapping. At the moment I need to know what the advertised "6 x I2S" really means. I'm not going to invest time, dealing with pin mapping, before I understand the advertised "6 x I2S". Currently, as you wrote, the Relax kit board user manual (Infineon Technologies ) shows in figure 6 example of the pin mappings though it is missing data inputs pins. Currently, DAVE is not able to setup the USICs as I2S. There must be a catch somewhere.

For connecting a WM8580 containing two ADCs and six DACs, the following lines are needed (viewed from the XMC4500) :

- I2S_data_in1
- I2S_data_out1
- I2S_data_out2
- I2S_data_out3
- I2S_SCLK
- I2S_WS
- I2C_SCL (as control bus)
- I2C_SDA (as control bus)

Can somebody advise me how to assign the USICs on the Infineon XMC4500 Relax Lite kit ?
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