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Old 19th January 2012, 11:03 AM   #101
chaparK is offline chaparK  Luxembourg
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This project sounds extremely interesting, congrats for taking on such a beautiful design.
However, I believe that it should be discussed in a separate thread because this thread is talking about a simple ARM-based design, and I suggest that you guys post a link to your thread and allow the OP to develop here his idea.

Kindest greetings,

Nick

(Link posted in previous post, apologies)

Last edited by chaparK; 19th January 2012 at 11:08 AM.
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Old 19th January 2012, 11:20 AM   #102
sgpu is offline sgpu  United Kingdom
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Nick,

The DM8148 has a 1Ghz Arm Cortex-A8 with a powerful DSP and various other high performance blocks. :-) Consider the discussion moved. :-)
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Old 19th January 2012, 11:24 AM   #103
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Originally Posted by sgpu View Post
Whatever floats your boat for linux development. The board will run a wide variety of OS. I am currently booting Ubuntu or Gingerbread on the EVM. Have you come across the BeagleBoard before? I'm building a more powerful version of that.
Yes I have seen the beagle board but it hasn't got much in the way of on-board audio.

regards
Trev
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Old 19th January 2012, 11:33 AM   #104
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Quote:
Originally Posted by sgpu View Post
Consider the discussion moved. :-)
Thanks Good luck with your project!

@chaparK - thanks for your support for keeping this thread on-topic
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Old 20th January 2012, 01:33 AM   #105
rsdio is offline rsdio  United States
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I apologize for my excited contribution to the off-topic discussion. I assumed that the Topic "Open Source DSP XOs" was broader. No worries, I can follow both threads.
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Old 20th January 2012, 07:44 PM   #106
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Originally Posted by rsdio View Post
The SGPIO looks very useful, and I think he said there are 8 on the chip, so that's potentially 16 stereo DAC chips or even more channels if you're willing to use multichannel chips (assuming the clock rates of the SGPIO can keep up).
16 slices, max SGPIO_CLOCK of 204MHz.* In theory that's 14 32 bit I2S lines at 1.536MHz---enough to operate 3.5 eight channel ESS DACs at their maximum input rate---though one would likely run out of CPU first and one would probably want more than one BLCK and LRCLK. A more typical upper bound for a DSP XO would be three or four I2S at 352.8kHz. This allows use of the 8Fs bypass mode in DACs which have it, meaning the lowpasses in the crossover can be provide some or all of the antialiasing filtering. Things get tricky with the tweeter but basically one gets something which combines the low THD, high SNR, and ready parts availability of sigma-delta DACs with time domain behavior which begins to approximate that of a NOS DAC.

Whether or not this would have audible effects is debatable but I have reason to suspect that, when combined with other sources of preringing such as linear phase crossovers, there's likely some advantage to reducing DAC preringing. So it would be interesting to give it a try and find out. From what I'm seeing the LPC43x0 is probably the lowest cost DSC or DSP based way to do this and hence the best suited for DIY. Parts with IO capabilities comparable to SGPIO aren't necessarily a whole lot more expensive but the cost risers for development environments and programmer/debuggers all seem to be significant compared to LPCxpresso and a Red Probe. There might be a viable FPGA alternative---at this point I haven't looked.

In this presentation there's biquad performance data at 25:30 which works out to just under 100% CPU utilization on the LPC4300's M4 core with 37 stereo biquads at 44.1. Itís unclear if the biquads in question are 16 bit fixed point, 32 bit fixed point, single precision floating point, or double precision. My guess is floating point, as the last presentation here indicates 47 32 bit stereo biquads at 44.1. My three way crossover and EQ is probably a little more complex than most and totals 23 biquads. That implies a single LPC4300 solution should work well for most CD audio processing needs and could accommodate 24/96 from DVD. Unfortunately I would like to operate at least 9 biquads at 8Fs and just those 9 want 175% of a 180MHz M4 core. That suggests one LPC4300 for the tweeters, another for the midrange, and a third for the subs. Perhaps a clever algorithm can be found but, given the feedback in IIR filters, Iím not immediately seeing one. (There is a special case where, if oversampling is implemented by zero stuffing, one could do some loop unrolling and take advantage of the zeros to operate an oversampled biquad at roughly the same cycle count as a biquad at Fs. Only works for the first biquad in the oversampled filter chain, though.)

DigiKey has one one LPC4300 part in stock so far and it's a BGA. Pricing is attractive, though. The parts cost for three LPC4300s is roughly equal to a Blackfin with comparable processing power. A little more soldering but no several thousand dollar Visual DSP license.

* Not counting the two dedicated I2S peripherals.
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Old 21st January 2012, 04:09 AM   #107
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Just one thought - if you're doing a sub XO at 8fs the noise gain might be such that even 32bits fixed point isn't enough. If you don't want to use floating point and you're going one CPU per driver then the 180MHz M3 (LPC18XX) might just be able to squeeze it in. By the way NXP has re-specified the LPC43XX at 204MHz, not that that helps you too much. It'd be worth experimenting with overclocking so long as the code all fits into SRAM.
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Old 21st January 2012, 07:26 AM   #108
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Yes, that'd occurred to me. But I figured the previous post was long enough as it was. However, I just got done taking a closer look at the filter design and in my case it appears there's no benefit to bypassing DAC filters for the subs and mid. The crossovers are low enough and steep enough the amount of signal shaped by the DAC's antialiasing filter is negligible. So I probably posted the above a bit prematurely.

For the tweeter the usual IIR alignments are not pretty. I don't have Craven's paper on apodizing filters but at the moment it's unclear to me there's much design win to be had from choosing different tradeoffs than Wolfson did in in the WM8741 and 8742. There is an interesting set of possibilities around oversampling a 44.1 tweeter channel to 2Fs or 4Fs post crossover and EQ. This causes the DAC to emit some amount of aliased ultrasonic content and, depending on the DAC, may or may not be advantageous. For example, with ESS parts operation at 1Fs with the slow rolloff filter accomplishes essentially the same thing---the 1Fs stopband doesn't start until ~0.75Fs. With other DACs such as the CS4398 or those two Wolfson parts the resulting shaping of the antialiasing filter's impulse response seems like it could offer subjective benefit. In its simplest form this approach imposes very little CPU load as the SGPIO slice just repeatedly clocks out the same shift register values. One could include a few biquads or an FIR for additional shaping post oversampling and still fit the whole three way crossover and EQ in a single LPC4300.

The flexibility to flip the DAC into different sample rates, reduced parts cost, and reduced amount of glue code compared to the SigmaDSP + microcontroller approach I was looking at a few pages back in this thread is certainly appealing. The lower end of the LPC range is a dollar more than the ATmegaD4 I was thinking of using. Yikes!
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Old 24th January 2012, 01:57 AM   #109
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Default More M4s - this time from Infineon

XMC - Infineon Technologies

No datasheets yet - they're 90nm parts, 120MHz. Pricing 1-7 euro allegedly. First samples in March.
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Old 24th January 2012, 10:10 PM   #110
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The Infineon XMC4500 will be easier to program than the NXP LPC4300 asymetric core (M4 + M0) and SGPIO.

The Infineon XMC4500 has 6x Multi-function serial interface modules configurable to SPI, I2C, I2S, UART. It might thus provide the required serial interfaces for a 3-way stereo crossover :

- 1 x I2S (left and right inputs)
- 3 x I2S (crossover outputs)
- 1 x SPI (SPDIF receiver mode, ADC mode, ASRC mode, DACs mode, volume control, display)
- 1 x I2C if some chips require one

USB for communicating with a PC, for setting up the crossover. Possibly, the same USB as asynchronous audio input ?

Memory-mapped LCD display using the bus interface.

Looks promising !

P.S. 1
If the entire Microchip PIC32 product portfolio doesn't get very quickly an upgrade, similar to the 6x Multi-function serial interface modules configurable to SPI, I2C, I2S, UART, .... it will be the end of the Microchip PIC32. Currently it is unclear for me if only the recently introduced Microchip PIC32MX1 and PIC32MX2 have the I2S capability within SPI, or if such I2S capability within SPI is now present on the whole Microchip PIC32 product portfolio.

P.S. 2
With all those new Cortex-M4 coming with flexible and configurable serial interfaces, supporting I2S, the recently introduced STM32 F4 looks quite rigid with only two I2S. And quite paradoxal, as it has a nice audio clocking scheme. Will we see a STM32 F4 upgrade, shortly ?

P.S. 3
What about T.I. LM4F1xx and LM4F2xx Cortex-M4 ? How many I2S ?
Attached Images
File Type: jpg Infineon XMC4500.JPG (44.0 KB, 257 views)

Last edited by steph_tsf; 24th January 2012 at 10:39 PM.
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